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TAS5424ATPHDRQ1 Datasheet(PDF) 8 Page - Texas Instruments |
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TAS5424ATPHDRQ1 Datasheet(HTML) 8 Page - Texas Instruments |
8 / 48 page www.ti.com ABSOLUTE MAXIMUM RATINGS TAS5414A, TAS5424A SLOS535A – JULY 2007 – REVISED FEBRUARY 2008 Table 1. TERMINAL FUNCTIONS (continued) TERMINAL DKD Package PHD Package TYPE(1) DESCRIPTION NAME TAS5414A TAS5424A TAS5414A TAS5424A NO. NO. NO. NO. SDA 3 3 63 63 DI/DO I2C data I/O for communication with system I2C master SGND 11 12 9 9 AG/DG Signal ground (analog and digital signal ground) STANDBY 7 8 4 4 DI Active-low STANDBY pin. Standby (low), power up (high) over operating free-air temperature range (unless otherwise noted) VALUE UNIT PVDD DC supply voltage range Relative to PGND –0.3 to 30 V PVDDMAX Pulsed supply voltage range t ≤ 100 ms exposure –1 to 50 V PVDDRAMP Supply voltage ramp rate Voltage rising up to PVDDMAX 25 V/ms IPVDD Externally imposed dc supply current per PVDD or PGND pin ±12 A IPVDD_MAX Pulsed supply current per PVDD pin (one shot) t < 100 ms 17 A IO Maximum allowed dc current per output pin ±13.5 A IO_MAX (1) Pulsed output current per output pin (single pulse) t < 100 ms ±17 A IIN_MAX Maximum current, all digital and analog input pins(2) DC or pulsed ±1 mA IMUTE_MAX Maximum current on MUTE pin DC or pulsed ±20 mA IIN_ODMAX Maximum sinking current for open-drain pins 7 mA Input voltage range for logic pin relative to SGND (SCL and Supply voltage range: VLOGIC –0.3 to 7 V SDA pins) 6.5 V < PVDD < 24 V Supply voltage range: VI2C_ADDR Input voltage range for I2C_ADDR pin relative to SGND –0.3 to 7 V 6.5 V < PVDD < 24 V Supply voltage range: VSTANDBY Input voltage range for STANDBY pin –0.3 to 5.8 V 6.5 V < PVDD < 24V Supply voltage range: VOSC_SYNC Input voltage range for OSC_SYNC pin relative to SGND –0.3 to 3.6 V 6.5 V < PVDD < 24 V Maximum instantaneous input voltage (per pin), analog input Supply voltage range: VAIN_MAX 6.5 V pins 6.5 V < PVDD < 24 V Maximum ac-coupled input voltage for TAS5414A(2), analog Supply voltage range: VAIN_AC_MAX_5414 1.9 Vrms input pins 6.5 V < PVDD < 24 V 3.8 Maximum ac-coupled differential input voltage for Supply voltage range: VAIN_AC_MAX_5424 (1.9 per Vrms TAS5424A(2), analog input pins 6.5 V < PVDD < 24 V pin) Supply voltage range: VAIN_DC Input voltage range for analog pin relative to AGND (INx pins) –0.3 to 6.5 V 6.5 V < PVDD < 24 V TJ Maximum operating junction temperature range –55 to 150 °C Tstg Storage temperature range –55 to 150 °C Lead temperature during soldering 1,6 mm (1/16 inch) from TSOLDER 260 °C case for 10 seconds Power dissipation Continuous power dissipation Tcase = 70°C 80 W VPGND Maximum voltage between PGND and GND ±0.3 V VSGND Maximum voltage between SGND and GND ±0.3 V (1) Pulsed current ratings are maximum survivable currents externally applied to the TAS5414A and TAS5424A. High currents may be encountered during reverse battery, fortuitous open ground, and fortuitous open supply fault conditions. (2) See Application Information section for information on analog input voltage and ac coupling. 8 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TAS5414A TAS5424A |
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