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ST7LITE0 Datasheet(PDF) 44 Page - STMicroelectronics |
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ST7LITE0 Datasheet(HTML) 44 Page - STMicroelectronics |
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44 / 122 page  ST7LITE0, ST7SUPERLITE 44/122 I/O PORTS (Cont’d) CAUTION: The alternate function must not be ac- tivated as long as the pin is configured as input with interrupt, in order to avoid generating spurious interrupts. Analog alternate function When the pin is used as an ADC input, the I/O must be configured as floating input. The analog multiplexer (controlled by the ADC registers) switches the analog voltage present on the select- ed pin to the common analog rail which is connect- ed to the ADC input. It is recommended not to change the voltage level or loading on any port pin while conversion is in progress. Furthermore it is recommended not to have clocking pins located close to a selected an- alog pin. WARNING: The analog input voltage level must be within the limits stated in the absolute maxi- mum ratings. 10.3 UNUSED I/O PINS Unused I/O pins must be connected to fixed volt- age levels. Refer to Section 13.8. 10.4 LOW POWER MODES 10.5 INTERRUPTS The external interrupt event generates an interrupt if the corresponding configuration is selected with DDR and OR registers and the interrupt mask in the CC register is not active (RIM instruction). 10.6 I/O PORT IMPLEMENTATION The hardware implementation on each I/O port de- pends on the settings in the DDR and OR registers and specific feature of the I/O port such as ADC In- put or true open drain. Switching these I/O ports from one state to anoth- er should be done in a sequence that prevents un- wanted side effects. Recommended safe transi- tions are illustrated in Figure 29 Other transitions are potentially risky and should be avoided, since they are likely to present unwanted side-effects such as spurious interrupt generation. Figure 29. Interrupt I/O Port State Transitions The I/O port register configurations are summa- rised as follows. Table 11. Port Configuration Mode Description WAIT No effect on I/O ports. External interrupts cause the device to exit from WAIT mode. HALT No effect on I/O ports. External interrupts cause the device to exit from HALT mode. Interrupt Event Event Flag Enable Control Bit Exit from Wait Exit from Halt External interrupt on selected external event - DDRx ORx Yes Yes 01 floating/pull-up interrupt INPUT 00 floating (reset state) INPUT 10 open-drain OUTPUT 11 push-pull OUTPUT XX = DDR, OR Port Pin name Input (DDR=0) Output (DDR=1) OR = 0 OR = 1 OR = 0 OR = 1 Port A PA7 floating pull-up interrupt open drain push-pull PA6:1 floating pull-up open drain push-pull PA0 floating pull-up interrupt open drain push-pull Port B PB4 floating pull-up open drain push-pull PB3 floating pull-up interrupt open drain push-pull PB2:1 floating pull-up open drain push-pull PB0 floating pull-up interrupt open drain push-pull 1 |
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