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EM7162SP16AW-55L Datasheet(PDF) 9 Page - Emerging Memory & Logic Solutions Inc |
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EM7162SP16AW-55L Datasheet(HTML) 9 Page - Emerging Memory & Logic Solutions Inc |
9 / 11 page EM7162SP16AW Series 1Mx16 Multiplexed STRAM 9 TIMING WAVEFORM OF POWER UP Power Up Mode VCC CS 200us VCC(Min.) Normal Operation NOTE . ( POWER UP ) 1. After Vcc reaches Vcc(Min.) , wait 200us with CS high. Then you get into the normal operation. Configuration Register Setting Table Bit Number Definition Remark 15 ~ 8 Do not use in normal mode 7 ~ 4 Reserved for future use 3 ~ 2 Reduced Memory Size Bit 3 Bit 2 Memory Size Using Addresses 0 0 Full Array(Default) ADQ0~15 , A16~A19 0 1 1/2 Array ADQ0~15 , A16~A18 1 0 1/4 Array ADQ0~15 , A16~A17 1 1 1/8 Array ADQ0~15 , A16 1 ~ 0 Temperature Bit 1 Bit 0 Temperature Range 0 0 Auto TCSR RMS (Reduced Memory Size) The 16M STRAM can be operated as a 2M, 4M, 8M or 16M device. The mode is set according to configuration register access timings, and the array size is set by configuration register bit 2 and 3. While operating in the RMS mode, the unselected memory array may not be used. TCSR (Temperature Cotrolled Self Refresh) The 16M STRAM can be operated with temperature controlled self-refresh. The device internal self-refresh period is controlled according as temperature change automatically. |
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