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ADS5481 Datasheet(PDF) 9 Page - Texas Instruments |
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ADS5481 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 35 page ADS5481 ADS5482, ADS5483 www.ti.com ...................................................................................................................................................................................................... SLAS565 – JUNE 2008 Table 1. TERMINAL FUNCTIONS TERMINAL DESCRIPTION NAME NO. 1, 2, 8, 14, 18, AVDD5 5V Analog Supply 24, 27, 30 9, 15, 19, 25, AVDD3 3.3V Analog Supply 28, 31 3, 7, 10, 13, 17, AGND 20, 23, 26, 29, Analog Ground 32 DVDD3 42, 52, 63 3.3V Digital Supply DGND 41, 51, 64 Digital Ground NC 5, 6, 37-40 No Connects - leave floating INP, INM 11, 12 Differential Analog Inputs (P = Plus = true, M = Minus = complement) CLKM, CLKP 21, 22 Differential Clock Inputs (P = Plus = true, M = Minus = complement) Reference Voltage Input/Output (1.2V nominal). To use an external reference and to turn the internal REF 4 reference off, pull both PDWNF and PDWNS to logic HIGH (DVDD3). Analog Input Common Mode, Output (3.1V), for use in applications that require use of the internally VCM 16 generated common-mode. See the Applications section for more information on using VCM. External Bias resistor for LVDS bias current, normally 10k Ω to GND to provide nominal 3.5mA LVDS LVDSB 33 current Light Sleep Power Down, Fast Wakeup, Logic HIGH (DVDD3) = light sleep enabled (bandgap reference PDWNF 35 remains ON) Deep Sleep Power Down, Slow Wakeup, Logic HIGH (DVDD3) = deep sleep enabled (bandgap PDWNS 34 reference is OFF) DITHER 36 Dither Enable, Logic High (DVDD3) = dither enabled DRY_P, 54, 53 DataReady Signal (LVDS Clockout) (P = Plus = true, M = Minus = complement) DRY_M D14_15_P, 62, 61 DDR LVDS output bits 14 then 15 (15 is MSB) (P = Plus = true, M = Minus = complement) D14_15_M DE_O_P, 43-50, 55-62 DDR LVDS output bits E (EVEN) then O (ODD) (P = Plus = true, M = Minus = complement) DE_O_M D0_1_P, 44, 43 DDR LVDS output bits 0 then 1 (0 is LSB) (P = Plus = true, M = Minus = complement) D0_1_M PowerPAD 65 Analog Ground (exposed pad on bottom of package) Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): ADS5481 ADS5482, ADS5483 |
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