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V54C3256404VS Datasheet(PDF) 10 Page - Mosel Vitelic, Corp |
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V54C3256404VS Datasheet(HTML) 10 Page - Mosel Vitelic, Corp |
10 / 52 page 10 V54C3256(16/80/40)4V(T/S/B) Rev. 1.6 September 2002 MOSEL VITELIC V54C3256(16/80/40)4V(T/S/B) Block Diagram x4 Configuration Row decoder Memory array Bank 0 8192 x 2048 x 4 bit Row decoder Memory array Bank 1 8192 x 2048 x 4 bit Row decoder Memory array Bank 2 8192 x 2048 x 4 bit Row decoder Memory array Bank 3 8192 x 2048 x 4 bit Input buffer Output buffer I/O1-I/O4 Column address counter Column address buffer Row address buffer Refresh Counter A0 - A12, BA0, BA1 A0 - A9, A11, AP, BA0, BA1 Control logic & timing generator Row Addresses Column Addresses |
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