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ADE7169ACPZF161 Datasheet(PDF) 6 Page - Analog Devices |
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ADE7169ACPZF161 Datasheet(HTML) 6 Page - Analog Devices |
6 / 148 page ADE75xx/ADE71xx Preliminary Technical Data Rev. PrE | Page 6 of 148 UART SFR register list ............................................................. 123 UART operation modes........................................................... 126 Mode 0 (Shift Register with baud rate fixed at Fcore /12) ................................................................................................. 126 Mode 1 (8-Bit UART, Variable Baud Rate)........................ 126 Mode 2 (9- bit UART with baud fixed at Fcore/64 or Fcore/32) ................................................................................................. 126 Mode 3 (9-Bit UART with Variable Baud Rate) ............... 127 UART Baud Rate Generation.................................................. 127 Mode 0 Baud Rate Generation ........................................... 127 Mode 2 Baud Rate Generation ........................................... 127 Modes 1 and 3 Baud Rate Generation ............................... 127 Timer 1 Generated Baud Rates........................................... 127 Timer 2 Generated Baud Rates........................................... 127 UART Timer Generated Baud Rates.................................. 128 UART additional features........................................................ 129 Enhanced Error Checking................................................... 129 UART TxD signal modulation ........................................... 129 Serial Peripheral Interface Interface (SPI)................................. 130 SPI SFR register list .................................................................. 130 SPI pins ...................................................................................... 132 MISO (Master In, Slave Out Data I/O Pin) ...................... 132 MOSI (Master Out, Slave In Pin) ....................................... 132 SCLK (Serial Clock I/O Pin)............................................... 132 SS (Slave Select Pin) ............................................................. 133 SPI Master Operating Modes.................................................. 133 SPI Interrupt and Status Flags ................................................ 134 I2C COMPATIBLE INTERFACE ............................................... 136 Serial Clock Generation .......................................................... 136 Slave addresses .......................................................................... 136 I2C SFR register list.................................................................. 136 Read and Write Operations..................................................... 137 I2C Receive and Transmit FIFOs ........................................... 138 Dual Data Pointers ....................................................................... 139 I/O Ports ........................................................................................ 141 Parallel I/O ................................................................................ 141 Weak Internal Pullups Enabled .......................................... 141 Open Drain (Weak Internal Pull-ups Disabled).............. 141 38 kHz Modulation .............................................................. 141 I/O SFR register list.................................................................. 142 Port 0.......................................................................................... 145 Port 1.......................................................................................... 146 Port 2.......................................................................................... 146 Outline Dimensions ..................................................................... 147 selection Guide ............................................................................. 148 Ordering Guide............................................................................. 148 |
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