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ADE7566ASTZF8-RL2 Datasheet(PDF) 10 Page - Analog Devices |
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ADE7566ASTZF8-RL2 Datasheet(HTML) 10 Page - Analog Devices |
10 / 136 page ADE7566/ADE7569 Preliminary Technical Data Rev. PrA | Page 10 of 136 Table 3. I2C-Compatible Interface Timing Parameters (400 kHz) Parameter Description Typ Unit tL SCLK low pulse width 1.36 μs tH SCLK high pulse width 1.14 μs tSHD Start condition hold time 251.35 μs tDSU Data setup time 740 ns tDHD Data hold time 400 ns tRSU Setup time for repeated start 12.5 ns tPSU Stop condition setup time 400 ns tR Rise time of both SCLK and SDATA 200 ns tF Fall time of both SCLK and SDATA 300 ns tSUP1 Pulse width of spike suppressed 50 ns 1 Input filtering on both the SCLK and SDATA inputs suppresses noise spikes less than 50 ns. MSB tBUF SDATA (I/O) SCLK (I) STOP CONDITION START CONDITION REPEATED START LSB ACK MSB 12–7 8 9 1 S(R) PS tPSU tDSU tSHD tDHD tSUP tDSU tDHD tH tSUP tL tRSU tR tR tF tF Figure 3. I2C-Compatible Interface Timing |
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