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SAK-XC2365-72F66L Datasheet(PDF) 11 Page - Infineon Technologies AG |
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SAK-XC2365-72F66L Datasheet(HTML) 11 Page - Infineon Technologies AG |
11 / 99 page XC2365 XC2000 Family Derivatives General Device Information Preliminary Data Sheet 9 V0.1, 2007-06 Draft Version Notes to Pin Definitions 1. Ctrl.: The output signal for a port pin is selected via bitfield PC in the associated register Px_IOCRy. Output O0 is selected by setting the respective bitfield PC to 1x00 B, output O1 is selected by 1x01B, etc. Output signal OH is controlled by hardware. 2. Type: Indicates the employed pad type (St=standard pad, Sp=special pad, DP=double pad, In=input pad, PS=power supply) and its power supply domain (A, B, M, 1). Table 2 Pin Definitions and Functions Pin Symbol Ctrl. Type Function 3 TESTM IIn/B Testmode Enable Enables factory test modes, must be held HIGH for normal operation (connect to V DDPB). 4 P7.2 O0 / I St/B Bit 2 of Port 7, General Purpose Input/Output EMUX0 O1 St/B External Analog MUX Control Output 0 TDI_C I St/B JTAG Test Data Input 5TRST IIn/B Test-System Reset Input For normal system operation, pin TRST should be held low. A high level at this pin at the rising edge of PORST activates the XC236x’s debug system. In this case, pin TRST must be driven low once to reset the debug system. 6 P7.0 O0 / I St/B Bit 0 of Port 7, General Purpose Input/Output T3OUT O1 St/B GPT1 Timer T3 Toggle Latch Output T6OUT O2 St/B GPT2 Timer T6 Toggle Latch Output TDO OH St/B JTAG Test Data Output ESR2_1 I St/B ESR2 Trigger Input 1 7 P7.3 O0 / I St/B Bit 3 of Port 7, General Purpose Input/Output EMUX1 O1 St/B External Analog MUX Control Output 1 U0C1_DOUT O2 St/B USIC0 Channel 1 Shift Data Output U0C0_DOUT O3 St/B USIC0 Channel 0 Shift Data Output TMS_C I St/B JTAG Test Mode Selection Input U0C1_DX0F I St/B USIC0 Channel 1 Shift Data Input |
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