List of Tables
Table 1.
Documentation Conventions ............................................................................................ 18
Table 3-1.
Memory Map ................................................................................................................... 39
Table 4-1.
Exception Types .............................................................................................................. 41
Table 4-2.
Interrupts ........................................................................................................................ 42
Table 5-1.
JTAG Port Pins Reset State ............................................................................................. 45
Table 5-2.
JTAG Instruction Register Commands ............................................................................... 50
Table 6-1.
System Control Register Map ........................................................................................... 60
Table 7-1.
Hibernation Module Register Map ................................................................................... 117
Table 8-1.
Flash Protection Policy Combinations ............................................................................. 133
Table 8-2.
Flash Resident Registers ............................................................................................... 134
Table 8-3.
Flash Register Map ........................................................................................................ 134
Table 9-1.
GPIO Pad Configuration Examples ................................................................................. 158
Table 9-2.
GPIO Interrupt Configuration Example ............................................................................ 158
Table 9-3.
GPIO Register Map ....................................................................................................... 159
Table 10-1.
16-Bit Timer With Prescaler Configurations ..................................................................... 199
Table 10-2.
Timers Register Map ...................................................................................................... 205
Table 11-1.
Watchdog Timer Register Map ........................................................................................ 232
Table 12-1.
UART Register Map ....................................................................................................... 260
Table 13-1.
SSI Register Map .......................................................................................................... 306
Table 14-1.
Examples of I2C Master Timer Period versus Speed Mode ............................................... 335
Table 14-2.
Inter-Integrated Circuit (I2C) Interface Register Map ......................................................... 344
Table 14-3.
Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3) ................................................ 349
Table 15-1.
TX & RX FIFO Organization ........................................................................................... 371
Table 15-2.
Ethernet Register Map ................................................................................................... 374
Table 16-1.
Comparator 0 Operating Modes ..................................................................................... 412
Table 16-2.
Comparator 1 Operating Modes ...................................................................................... 413
Table 16-3.
Internal Reference Voltage and ACREFCTL Field Values ................................................. 413
Table 16-4.
Analog Comparators Register Map ................................................................................. 415
Table 18-1.
Signals by Pin Number ................................................................................................... 424
Table 18-2.
Signals by Signal Name ................................................................................................. 428
Table 18-3.
Signals by Function, Except for GPIO ............................................................................. 432
Table 18-4.
GPIO Pins and Alternate Functions ................................................................................. 436
Table 19-1.
Temperature Characteristics ........................................................................................... 438
Table 19-2.
Thermal Characteristics ................................................................................................. 438
Table 20-1.
Maximum Ratings .......................................................................................................... 439
Table 20-2.
Recommended DC Operating Conditions ........................................................................ 439
Table 20-3.
LDO Regulator Characteristics ....................................................................................... 440
Table 20-4.
Detailed Power Specifications ........................................................................................ 441
Table 20-5.
Flash Memory Characteristics ........................................................................................ 442
Table 20-6.
Phase Locked Loop (PLL) Characteristics ....................................................................... 442
Table 20-7.
Clock Characteristics ..................................................................................................... 442
Table 20-8.
Crystal Characteristics ................................................................................................... 443
Table 20-9.
Analog Comparator Characteristics ................................................................................. 443
Table 20-10.
Analog Comparator Voltage Reference Characteristics .................................................... 443
Table 20-11.
I2C Characteristics ......................................................................................................... 443
Table 20-12.
100BASE-TX Transmitter Characteristics ........................................................................ 444
October 09, 2007
10
Preliminary
Table of Contents