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EMIF10-COM01C2 Datasheet(PDF) 4 Page - STMicroelectronics |
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EMIF10-COM01C2 Datasheet(HTML) 4 Page - STMicroelectronics |
4 / 7 page Characteristics EMIF10-COM01C2 4/7 Figure 9. Aplac model 1.1 PCB grounding recommendations In order to ensure a good efficiency in terms of ESD protection and filtering behavior, we recommend to implement microvias (100 µm dia.) between the GND bumps and the GND layer. GND bumps can be connected together in PCB layer 1, and in addition, if possible, use through hole vias (200 µm dia.) in both sides of filter to improve contact to GND (layer). This layout will minimize the distance to the ground and thus parasitic inductances. In addition, we recommend to have GND plane wherever possible. Figure 8. Capacitance versus reverse applied voltage 10 20 30 40 50 012 345 VR(V) C(pF) F=1MHz Vosc=30mV Demif10 model BV = 7 IBV = 1m CJO = 25p M = 0.3333 RS = 1 VJ = 0.6 TT = 100n out in 200R MODEL = demif10 MODEL = demif10 sub |
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