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TDA758013TR Datasheet(PDF) 6 Page - STMicroelectronics |
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TDA758013TR Datasheet(HTML) 6 Page - STMicroelectronics |
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6 / 39 page  Overview TDA7580 6/39 1 Overview The algorithm is self-adaptive, thus it requires no “on-the-field” adjustments after the parameters optimization. The chip embeds a Band Pass Sigma Delta Analogue to Digital Converter for 10.7MHz IF conversion from a “tuner device” (the TDA7515 is highly recommended). The 24bit DSP allows flexibility in the algorithms implementation, thus giving some freedom for customer required features. The total processing power offers a significant headroom for customer’s software requirement, even when the channel equalization and the decoding software is running. the program and data memory space can be loaded from an external non volatile memory via I2C or SPI. The oscillator module works with an external 74.1MHz quartz crystal. It has very low electro magnetic interference, as it introduces very low distortion, and in any case harmonics fall outside the radio bandwidth. The companion tuner device receives the reference clock through a differential ended interface, which works off the oscillator module by properly dividing down the master clock frequency. That allows the overall system saving an additional crystal for the tuner. After the IF conversion, the digitized baseband signal passes through the base band processing section, either FM or AM, depending on the listener selection. The FM base band processing comprises of stereo decoder, spike detection and noise blanking. The AM noise blanking is fully software implemented. The internal RDS filter, demodulator and decoder features complete functions to have the output data available through either I2C or SPI interface. No DSP support is needed but at start-up, so that RDS can work in background and in parallel with other DSP processing. This mode (RDS only) allows current consumption saving for low power application modes. An I2C/SPI interface is available for any control and communication with the main micro, as well as RDS data interface. The DSP SPI block embeds a 10 words FIFO for both transmit and receive channels, to lighten the DSP task and frequently respond to the interrupt from the control interface. Serial audio interface (SAI) is the ideal solution for the audio data transfer, both transmit and receive: either master or slave. The flexibility of this module gives a wide choice of different protocols, including I2S. Two fully independent bidirectional data channels, with separate clocks allows the use of TDA7580 as general purpose digital audio processor. A fully asynchronous sample rate converter (ASRC) is available as a peripheral prior to sending audio data out via the SAI, so that internal audio sampling rate (~36kHz and FM/AM mode) can be adapted by upconversion to any external rate. An inter processor transport interface (HS3I, high speed synchronous serial interface) is also available for a modular system which implements Dual Tuner Diversity, thus enhancing the overall system performance. It is about a synchronous serial interface which exchanges data up to the MPX rate. It has been designed to reduce the electro magnetic interference toward the sensitive analogue signal from the tuner. General purpose I/O registers are connected to and controlled by the DSP, by means of memory map. A debug and test interface is available for on chip software debug as well as for internal registers read/write operation. |
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