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M74HC175 Datasheet(PDF) 1 Page - STMicroelectronics |
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M74HC175 Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 11 page 1/11 July 2001 s HIGH SPEED : tPD = 16 ns (TYP.) at VCC = 6V s LOW POWER DISSIPATION: ICC =4µA(MAX.) at TA=25°C s HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.) s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 175 DESCRIPTION The M74HC175 is an high speed CMOS HEX D-TYPE FLIP FLOP WITH CLEAR fabricated with silicon gate C2MOS technology. These four flip-flops are controlled by a clock input (CLOCK) and a clear input (CLEAR). The information data applied to the D inputs (1D to 4D) are transferred to the outputs (1Q to 4Q and 1Q to 4Q) on the positive-going edge of the clock pulse. The reset function is accomplished when the CLEAR input is low and all Q outputs are low regardless of other input conditions. All inputs are equipped with protection circuits against static discharge and transient excess voltage. M74HC175 QUAD D-TYPE FLIP FLOP WITH CLEAR PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE TUBE T & R DIP M74HC175B1R SOP M74HC175M1R M74HC175RM13TR TSSOP M74HC175TTR TSSOP DIP SOP |
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