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PCI-9812A Datasheet(PDF) 2 Page - System Logic Semiconductor

Part # PCI-9812A
Description  4-CH 10/12-bit 20 MS/s Simultaneous-Sampling Analog Input Cards
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Manufacturer  SLS [System Logic Semiconductor]
Direct Link  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor

PCI-9812A Datasheet(HTML) 2 Page - System Logic Semiconductor

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* All specifications are subject to change without further notice.
PCI High Speed Digitizer
5-4
Ordering Information
PCI-9810
4-CH 10-bit 20 MS/s Simultaneous-Sampling
Analog Input Card
PCI-9812
4-CH 12-bit 20 MS/s Simultaneous-Sampling
Analog Input Card
PCI-9812A
4-CH 12-bit 20 MS/s Simultaneous-Sampling
Analog Input Card with 128k-sample A/D
FIFO
Device
PCI-9812
PCI-9812A
PCI-9810
+5 V
1.4 A typical
1 A typical
External Sine Wave Clock
Input coupling: AC
Input impedance: 50 Ω
Input frequency: 300 kHz to 40 MHz
Input range: 1.0 to 2.0 Vpp
Overvoltage protection: 2.5 Vpp
External Digital Clock
Input coupling: DC
Input impedance: 50 Ω
Compatibility: 5 V/TTL
Input frequency: 20 kHz to 40 MHz
Overvoltage protection:
diode clamping, -0.3 V to +5.3 V
Digital Input
Number of channels: 3
Compatibility:
5 V/TTL with 10 KΩ pull down resistors
Overvoltage protection:
Diode clamping, -0.3 V to +5.3 V
Data transfers:
bus mastering DMA with A/D samples
General Specifications
I/O connector
BNC x 5
10-pin ribbon male
Operating temperature: 0 to 50
°C
Storage temperature: -20 to 80
°C
Relative humidity: 5 to 95 %, noncondensing
Power requirements
Dimensions (not including connectors)
173 mm x 108 mm
Pin Assignment
J1-J5: Analog Inputs & External
Sine Wave Clock
CH0
CH1
CH2
CH3
Ext. Sine Wave CLK
Shield: GND
Shield: GND
Shield: GND
Shield: GND
Shield: GND
1
2
3
4
5
Pin Assignment
JP1: External Digital Clock, Digital
Trigger & Digital Inputs
Ext. Digital CLK
Ext. Digital TRIG
DI0
DI1
DI2
GND
GND
GND
GND
GND
1
3
5
7
9
2
4
6
8
10
Specifications
Input Range
Input
Impedance
Overvoltage
protection
±1 V
±5 V
50 Ω
15 MΩ
50 Ω
1.25 kΩ
±2 V
±10 V
Analog Input
Number of channels: 4 single-ended
Resolution
12-bit (PCI-9812 and PCI-9812A)
10-bit (PCI-9810)
Maximum sampling rate: 20 MS/s
Input signal ranges, impedance and overvoltage
protection
Accuracy:
±1.5 % typical
DNL:
±0.4 LSB typical, ±1.0 LSB maximum
INL:
±1.9 LSB typical
Input coupling: DC
Trigger sources: software, analog and digital
trigger (5 V/TTL compatible)
Trigger modes:
software-trigger, pre-trigger, post-trigger,
middle-trigger & delay trigger
FIFO buffer size
32k samples (PCI-9810 & PCI-9812)
128k samples (PCI-9812A)
Data transfers: bus mastering DMA
Triggering
Analog triggering
Modes:
pre-trigger, post-trigger, middle-trigger,
delay-trigger
Source: CH0, CH1, CH2 and CH3
Slope: rising/falling
Coupling: DC
Trigger sensitivity:
256 steps in full-scale voltage range
Digital triggering
Modes:
pre-trigger, post-trigger, middle-trigger,
delay-trigger
Source: external digital trigger
Slope: rising edge
Compatibility: 5 V/TTL
Minimum pulse width: 25 ns


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