Lattice Semiconductor

ispMACH 4000ZE Family Data Sheet

34

ispMACH 4000ZE Power Supply and NC Connections

1

Signal

48 TQFP

2

64 csBGA

3, 4

100 TQFP

2

VCC

12, 36

E4, D5

25, 40, 75, 90

VCCO0

VCCO (Bank 0)

6

4032ZE: E3

4064ZE: E3, F4

13, 33, 95

VCCO1

VCCO (Bank 1)

30

4032ZE: D6

4064ZE: D6, C6

45, 63, 83

GND

13, 37

D4, E5

1, 26, 51, 76

GND (Bank 0)

5

D4, E5

7, 18, 32, 96

GND (Bank 1)

29

D4, E5

46, 57, 68, 82

NC

———

1. All grounds must be electrically connected at the board level. However, for the purposes of I/O current loading, grounds are associated with

the bank shown.

2. Pin orientation follows the conventional order from pin 1 marking of the top side view and counter-clockwise.

3. Pin orientation A1 starts from the upper left corner of the top side view with alphabetical order ascending vertically and numerical order

ascending horizontally.

4. All bonded grounds are connected to the following two balls, D4 and E5.