LC4128ZE7TN48C datasheet(21/54 Pages) LATTICE

Part #	LC4128ZE7TN48C

Description	1.8V In-System Programmable Ultra Low Power PLDs

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Manufacturer	LATTICE [Lattice Semiconductor]

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Lattice Semiconductor

ispMACH 4000ZE Family Data Sheet

21

I/O DC Electrical Characteristics

Over Recommended Operating Conditions

Standard

VIL

VIH

VOL

Max (V)

VOH

Min (V)

IOL

1

(mA)

IOH

1

(mA)

Min (V)

Max (V)

Min (V)

Max (V)

LVTTL

-0.3

0.80

2.0

5.5

0.40

VCCO - 0.40

8.0

-4.0

0.20

VCCO - 0.20

0.1

-0.1

LVCMOS 3.3

-0.3

0.80

2.0

5.5

0.40

VCCO - 0.40

8.0

-4.0

0.20

VCCO - 0.20

0.1

-0.1

LVCMOS 2.5

-0.3

0.70

1.70

3.6

0.40

VCCO - 0.40

8.0

-4.0

0.20

VCCO - 0.20

0.1

-0.1

LVCMOS 1.8

-0.3

0.35 * VCC

0.65 * VCC

3.6

0.40

VCCO - 0.45

2.0

-2.0

0.20

VCCO - 0.20

0.1

-0.1

LVCMOS 1.5

2

-0.3

0.35 * VCC

0.65 * VCC

3.6

0.40

VCCO - 0.45

2.0

-2.0

0.20

VCCO - 0.20

0.1

-0.1

PCI 3.3

-0.3

0.3 * 3.3 * (VCC / 1.8) 0.5 * 3.3 * (VCC / 1.8)

5.5

0.1 VCCO

0.9 VCCO

1.5

-0.5

1. The average DC current drawn by I/Os between adjacent bank GND connections, or between the last GND in an I/O bank and the end of

the I/O bank, as shown in the logic signals connection table, shall not exceed n*8mA. Where n is the number of I/Os between bank GND

connections or between the last GND in a bank and the end of a bank.

2. For 1.5V inputs, there may be an additional DC current drawn from VCC, if the ispMACH 4000ZE VCC and the VCC of the driving device

(VCCd-d; that determines steady state VIH) are in the extreme range of their speciﬁcations. Typically, DC current drawn from VCC will be

2µA per input.

VO Output Voltage (V)

0

10

20

30

40

50

60

2.0

1.5

1.0

0.5

1.8V VCCO

IOH

IOL

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LC4128ZE7TN48C Datasheet(PDF) 21 Page - Lattice Semiconductor

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