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LC4384V-10T176I Datasheet(PDF) 28 Page - Lattice Semiconductor |
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LC4384V-10T176I Datasheet(HTML) 28 Page - Lattice Semiconductor |
28 / 99 page Lattice Semiconductor ispMACH 4000V/B/C/Z Family Data Sheet 28 tPDLi Propagation Delay through Transparent Latch to Output/ Feedback MUX — 0.25 — 0.25 — 0.25 — 0.25 ns tSRi Asynchronous Reset or Set to Output/Feedback MUX Delay 0.28 — 0.28 — 0.28 — 0.28 — ns tSRR Asynchronous Reset or Set Recovery Time 1.67 — 1.67 — 1.67 — 1.67 — ns Control Delays tBCLK GLB PT Clock Delay — 1.12 — 1.12 — 1.12 — 1.12 ns tPTCLK Macrocell PT Clock Delay — 0.87 — 0.87 — 0.87 — 0.87 ns tBSR Block PT Set/Reset Delay — 1.83 — 1.83 — 1.83 — 1.83 ns tPTSR Macrocell PT Set/Reset Delay — 1.11 — 1.41 — 1.51 — 1.61 ns tGPTOE Global PT OE Delay — 2.83 — 4.13 — 5.33 — 5.33 ns tPTOE Macrocell PT OE Delay — 1.83 — 2.13 — 2.33 — 2.83 ns Timing v.3.2 Note: Internal Timing Parameters are not tested and are for reference only. Refer to Timing Model in this data sheet for further details. ispMACH 4000V/B/C Internal Timing Parameters (Cont.) Over Recommended Operating Conditions Parameter Description -2.5 -2.7 -3 -3.5 Units |
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