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LCMXO2280LUTSE-5FT256CES Datasheet(PDF) 11 Page - Lattice Semiconductor |
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LCMXO2280LUTSE-5FT256CES Datasheet(HTML) 11 Page - Lattice Semiconductor |
11 / 95 page 2-8 Architecture Lattice Semiconductor MachXO Family Data Sheet Figure 2-8. Primary Clocks for MachXO1200 and MachXO2280 Devices Four secondary clocks are generated from four 16:1 muxes as shown in Figure 2-9. Four of the secondary clock sources come from dual function clock pins and 12 come from internal routing. Figure 2-9. Secondary Clocks for MachXO Devices PLL Outputs Routing Clock Pads Primary Clock 0 Primary Clock 1 Primary Clock 2 Primary Clock 3 4 Up to 9 Up to 6 16:1 16:1 16:1 16:1 Routing Clock Pads Secondary (Control) Clocks 4 12 16:1 16:1 16:1 16:1 |
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