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LC4256V-75TN176I Datasheet(PDF) 43 Page - Lattice Semiconductor

Part # LC4256V-75TN176I
Description  3.3V/2.5V/1.8V In-System Programmable SuperFAST High Density PLDs
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Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

LC4256V-75TN176I Datasheet(HTML) 43 Page - Lattice Semiconductor

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Lattice Semiconductor
ispMACH 4000V/B/C/Z Family Data Sheet
43
ispMACH 4000V/B/C/Z Power Supply and NC Connections
1
Signal
44-pin TQFP
2
48-pin TQFP
2
56-ball csBGA
3
100-pin TQFP
2
128-pin TQFP
2
VCC
11, 33
12, 36
K2, A9
25, 40, 75, 90
32, 51, 96, 115
VCCO0
VCCO (Bank 0)
6
6
F3
13, 33, 95
3, 17, 30, 41, 122
VCCO1
VCCO (Bank 1)
28
30
E8
45, 63, 83
58, 67, 81, 94, 105
GND
12, 34
13, 37
H3, C8
1, 26, 51, 76
1, 33, 65, 97
GND (Bank 0)
5
5
D3
7, 18, 32, 96
10, 24, 40, 113, 123
GND (Bank 1)
27
29
G8
46, 57, 68, 82
49, 59, 74, 88, 104
NC
——
4032Z: A8, B10, E1,
E3, F8, F10, J1, K3
——
1. All grounds must be electrically connected at the board level. However, for the purposes of I/O current loading, grounds are associated with
the bank shown.
2. Pin orientation follows the conventional order from pin 1 marking of the top side view and counter-clockwise.
3. Pin orientation A1 starts from the upper left corner of the top side view with alphabetical order ascending vertically and numerical order
ascending horizontally.


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