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V62C5181024LL-35P Datasheet(PDF) 2 Page - Mosel Vitelic, Corp

Part # V62C5181024LL-35P
Description  128K X 8 STATIC RAM
Download  12 Pages
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Manufacturer  MOSEL [Mosel Vitelic, Corp]
Direct Link  http://www.moselvitelic.com
Logo MOSEL - Mosel Vitelic, Corp

V62C5181024LL-35P Datasheet(HTML) 2 Page - Mosel Vitelic, Corp

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V62C5181024 Rev. 2.2 February 2000
MOSEL VITELIC
V62C5181024
Pin Descriptions
A0–A16
Address Inputs
These 17 address inputs select one of the 128K x 8
bit segments in the RAM.
CE1, CE2 Chip Enable Inputs
CE1 is active LOW and CE2 is active HIGH. Both
chip enables must be active to read from or write to
the device. If either chip enable is not active, the
device is deselected and is in a standby power
mode. The I/O pins will be in the high-impedance
state when deselected.
OE
Output Enable Input
The Output Enable input is active LOW. When OE
is LOW with CE LOW and WE HIGH, data of the
selected memory location will be available on the
I/O pins. When OE is HIGH, the I/O pins will be in
the high impedance state.
WE
Write Enable Input
An active LOW input, WE input controls read and
write operations. When CE and WE inputs are both
LOW, the data present on the I/O pins will be
written into the selected memory location.
I/O0–I/O7 Data Input and Data Output Ports
These 8 bidirectional ports are used to read data
from and write data into the RAM.
VCC
Power Supply
GND
Ground
Pin Configurations (Top View)
32-Pin DIP/SOP
32-Pin TSOP (Standard)
1
32
5181024 02
2
31
3
30
4
29
5
28
6
27
7
26
8
25
9
24
10
23
11
22
12
21
13
20
14
19
15
18
16
17
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
NC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
VCC
A11
A9
A8
A13
WE
CE2
A15
VCC
NC
A16
A14
A12
A7
A6
A5
A4
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
5181024 03


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