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LC5512MC-52FN672C Datasheet(PDF) 62 Page - Lattice Semiconductor |
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LC5512MC-52FN672C Datasheet(HTML) 62 Page - Lattice Semiconductor |
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62 / 92 page  Lattice Semiconductor ispXPLD 5000MX Family Data Sheet 62 3 79N K8 K5 L8 K9 — — F13 3 79P K6 K4 L6 K7 — — F15 3 80N K5 K3 L5 — — — D16 3 80P K4 K2 L4 — — E10 1 E16 3 81N K2 K1 L2 K3 — A12 A16 3 81P K0 K0 L0 K1 — A11 A15 — — GND (Bank 3) — — — — GND (Bank 3) GND (Bank 3) 3 82N L30 I15 K15 L31 162 B11 B15 —— VCCO3 —— — — VCCO3 VCCO3 3 82P L28 I14 K14 L29 163 C11 A14 3 83N L26 I13 K13 L27 164 B10 D15 3 83P L24 I12 K12 L25 165 A10 E15 3 84N L22 I11 K11 L23 166 C10 D14 3 84P L21 I10 K10 — 167 D10 F14 3 85N L20 I9 K9 — 168 C9 A13 3 85P L18 I8 K8 L19 169 E9 B13 3 86N L16/VREF3 I29 K29 L17 170 D9 C14 3 86P L14 I28 K28 L15 171 F9 E14 3 87N L12 I7 K7 L13 172 A9 E13 3 87P L10 I6 K6 L11 173 F8 F12 — — GND (Bank 3) — — — 174 GND (Bank 3) GND (Bank 3) 3 88N L8 I5 K5 L9 175 E8 D13 —— VCCO3 — — — 176 VCCO3 VCCO3 3 88P L6 I4 K4 L7 177 A8 C13 3 89N L5 I3 K3 — 178 B9 E12 3 89P L4 I2 K2 — 179 D8 C12 — — VCC — — — 180 VCC VCC 3 90N L2 I1 K1 L3 181 B8 B12 3 90P L0 I0 K0 L1 182 C8 A12 0 91N M30 M31 O31 M31 183 B7 E11 0 91P M28 M30 O30 M29 184 A7 C11 — — GND — — — 185 — GND — — GND — — — — GND GND 0 92N M26 M29 O29 M27 186 D7 B11 0 92P M24 M28 O28 M25 187 C7 A11 0 93N M22 M27 O27 M23 188 B6 F11 —— VCCO0 — — — 189 VCCO0 VCCO0 0 93P M21 M26 O26 M22 190 E7 F10 — — GND (Bank 0) — — — 191 GND (Bank 0) GND (Bank 0) 0 94N M20 M25 O25 M21 192 E6 E10 0 94P M18 M24 O24 M19 193 A6 C10 0 95N M16/VREF0 M3 O3 M17 194 A5 D10 0 95P M14 M2 O2 M15 195 A4 B10 ispXPLD 5512MX Logic Signal Connections (Continued) sysIO Bank LVDS Pair Primary Macrocell/ Function Alternate Outputs Alternate Input 208 PQFP Pin Number 256 fpBGA Ball Number 484 fpBGA Ball Number Macrocell 1 Macrocell 2 |
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