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HD74LV74AFPEL Datasheet(PDF) 2 Page - Renesas Technology Corp

Part # HD74LV74AFPEL
Description  Dual D-type Flip Flops with Preset and Clear
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD74LV74AFPEL Datasheet(HTML) 2 Page - Renesas Technology Corp

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HD74LV74A
Rev.3.00 Jun. 02, 2004 page 2 of 9
Pin Arrangement
V
2
CLR
2D
2CLK
2
PRE
2Q
2
Q
CC
1
CLR
GND
1D
1CLK
1
PRE
1Q
1
Q
(Top view)
11
12
13
14
1
2
3
4
5
6
7
8
9
10
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Conditions
Supply voltage range
VCC
–0.5 to 7.0
V
Input voltage range*
1
VI
–0.5 to 7.0
V
–0.5 to VCC + 0.5
Output: H or L
Output voltage range*
1, 2
VO
–0.5 to 7.0
V
VCC: OFF
Input clamp current
IIK
–20
mA
VI < 0
Output clamp current
IOK
±50
mA
VO < 0 or VO > VCC
Continuous output current
IO
±25
mA
VO = 0 to VCC
Continuous current through
VCC or GND
ICC or IGND
±50
mA
785
SOP
Maximum power dissipation at
Ta = 25°C (in still air)*
3
PT
500
mW
TSSOP
Storage temperature
Tstg
–65 to 150
°C
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are
observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.


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