2SJ484 datasheet(3/7 Pages) RENESAS

Part #	2SJ484

Description	Silicon P Channel MOS FET

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Manufacturer	RENESAS [Renesas Technology Corp]

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3 / 7 page

2SJ484

Rev.3.00 Sep 07, 2005 page 3 of 6

Main Characteristics

2.0

0.5

0

1.0

1.5

0

50

100

150

200

Ambient Temperature

Ta (°C)

Power vs. Temperature Derating

Test Condition:

When using the aluminum ceramic

board (12.5

× 20 × 70 mm)

Drain to Source Voltage VDS (V)

Maximum Safe Operation Area

–0.1

–10

–1

–0.1

–0.01

–0.3

–1

–3

–10

–30

–100

–3

–0.3

–0.03

Operation in

this area is

limited by RDS (on)

Ta = 25°C

–5

–4

–3

0

–1

–2

0

Drain to Source Voltage

VDS (V)

Typical Output Characteristics

–3 V

Pulse Test

–4.5 V

–3.5 V

–4 V

–2

–4

–6

–8

–10

–5

0

–1

–2

–3

–4

0

Gate to Source Voltage

VGS (V)

Typical Transfer Characteristics

–1

–2

–3

–4

–5

Tc = 75°C

–25°C

25°C

VDS = –10 V

Pulse Test

–1.0

0

–0.2

–0.4

–0.6

–0.8

0

Gate to Source Voltage

VGS (V)

Drain to Source Saturation Voltage vs.

Gate to Source Voltage

–4

–8

–12

–16

–20

Pulse Test

ID = –2 A

–0.5 A

–1 A

Drain Current

ID (A)

Static Drain to Source on State Resistance

vs. Drain Current

2

1

0.5

0.2

0.1

–20

–10 V

VGS = –4 V

Pulse Test

–0.1 –0.2

–0.5 –1

–2

–5

–10

100

µs

DC

Operation

1 ms

PW

= 10

ms

(1

shot)

VGS = –2.5 V

–10 V –6 V

–5 V

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