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M37224M3 Datasheet(PDF) 10 Page - Renesas Technology Corp |
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M37224M3 Datasheet(HTML) 10 Page - Renesas Technology Corp |
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10 / 84 page  M37224M3-XXXSP MITSUBISHI MICROCOMPUTERS SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER 9 MEMORY Special Function Register (SFR) Area The special function register (SFR) area in the zero page contains control registers such as I/O ports and timers. RAM RAM is used for data storage and for stack area of subroutine calls and interrupts. ROM ROM is used for storing user programs as well as the interrupt vector area. RAM for Display RAM for display is used for specifying the character codes and col- ors to display. ROM for Display ROM for display is used for storing character data. Interrupt Vector Area The interrupt vector area contains reset and interrupt vectors. Zero Page The 256 bytes from addresses 000016 to 00FF16 are called the zero page area. The internal RAM and the special function registers (SFR) are allocated to this area. The zero page addressing mode can be used to specify memory and register addresses in the zero page area. Access to this area with only 2 bytes is possible in the zero page addressing mode. Special Page The 256 bytes from addresses FF0016 to FFFF16 are called the spe- cial page area. The special page addressing mode can be used to specify memory addresses in the special page area. Access to this area with only 2 bytes is possible in the special page addressing mode. ROM Correction Memory (RAM) This is used as the program area for ROM correction. 000016 00C016 00FF16 013F16 06B316 D00016 SFR area Not used Not used FFFF16 FFDE16 FF0016 060016 Interrupt vector area Not used 1000016 10FFF16 1FFFF16 ROM for display (4K bytes) Special page ROM (12K bytes) RAM for display (Note) (80 bytes) Zero page RAM (256 bytes) Note: Refer to Table 8. Contents of CRT display RAM. ROM correction memory (RAM) Block 1: addresses 02C0 16 to 02DF16 Block 2: addresses 02E0 16 to 02FF16 021716 021B16 02C016 02FF16 2 page register Not used Not used Fig. 4. Memory Map |
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