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ADS62P23 Datasheet(PDF) 1 Page - Texas Instruments

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Part # ADS62P23
Description  DUAL CHANNEL, 12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

ADS62P23 Datasheet(HTML) 1 Page - Texas Instruments

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FEATURES
DESCRIPTION
APPLICATIONS
ADS62P25, ADS62P24
ADS62P23, ADS62P22
SLAS576A – OCTOBER 2007 – REVISED FEBRUARY 2008
www.ti.com
DUAL CHANNEL, 12-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS
• Radar Systems
• Maximum Sample Rate: 125 MSPS
• 12-Bit Resolution with No Missing Codes
ADS62P2X is a dual channel 12-bit A/D converter
• 95 dB Crosstalk
family with maximum sample rates up to 125 MSPS.
• Parallel CMOS and DDR LVDS Output Options
It
combines
high
performance
and
low
power
• 3.5 dB Coarse Gain and Programmable Fine
consumption in a compact 64 QFN package. Using
Gain up to 6 dB for SNR/SFDR Trade-Off
an internal sample and hold and low jitter clock
buffer, the ADC supports high SNR and high SFDR at
• Digital Processing Block with:
high input frequencies. It has coarse and fine gain
Offset Correction
options
that
can
be
used
to
improve
SFDR
Fine Gain Correction, in Steps of 0.05 dB
performance at lower full-scale input ranges.
Decimation by 2/4/8
ADS62P2X includes a digital processing block that
Built-in and Custom Programmable 24-Tap
consists of several useful and commonly used digital
functions such as ADC offset correction, fine gain
Low-/High-/Band-Pass Filters
correction (in steps of 0.05 dB), decimation by 2,4,8
• Supports Sine, LVPECL, LVDS, and LVCMOS
and in-built and custom programmable filters. By
Clocks and Amplitude Down to 400 mVPP
default, the digital processing block is bypassed, and
• Clock Duty Cycle Stabilizer
its functions are disabled.
• Internal Reference; Supports External
Two output interface options exist – parallel CMOS
Reference also
and DDR LVDS (Double Data Rate). ADS62P2X
• 64-QFN Package (9mm × 9mm)
includes
internal
references
while
traditional
reference pins and associated decoupling capacitors
• Pin Compatible 14-Bit Family (ADS62P4X)
have been eliminated. Nevertheless, the device can
also be driven with an external reference. The device
is specified over the industrial temperature range
• Wireless Communications Infrastructure
(–40
°C to 85°C).
• Software Defined Radio
• Power Amplifier Linearization
• 802.16d/e
• Test and Measurement Instrumentation
• High Definition Video
• Medical Imaging
ADS62P2X Performance Summary
ADS62P25
ADS62P24
ADS62P23
ADS62P22
Fin = 10 MHz (0 dB gain)
88
92
93
94
SFDR, dBc
Fin = 190 MHz (3.5 dB gain)
84
86
87
85
Fin = 10 MHz (0 dB gain)
71
71.3
71.5
71.5
SINAD, dBFS
Fin = 190 MHz (3.5 dB gain)
69.5
69.5
69.7
69.2
Analog power, mW
799
710
594
515
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2007–2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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