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H83068F Datasheet(PDF) 8 Page - Renesas Technology Corp |
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H83068F Datasheet(HTML) 8 Page - Renesas Technology Corp |
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8 / 935 page  Rev. 3.00 Sep 14, 2005 page viii of xxii 2.8.6 Reset State ........................................................................................................... 54 2.8.7 Power-Down State ............................................................................................... 55 2.9 Basic Operational Timing ................................................................................................. 56 2.9.1 Overview.............................................................................................................. 56 2.9.2 On-Chip Memory Access Timing........................................................................ 56 2.9.3 On-Chip Supporting Module Access Timing ...................................................... 57 2.9.4 Access to External Address Space....................................................................... 58 Section 3 MCU Operating Modes .................................................................................. 59 3.1 Overview........................................................................................................................... 59 3.1.1 Operating Mode Selection ................................................................................... 59 3.1.2 Register Configuration......................................................................................... 60 3.2 Mode Control Register (MDCR) ...................................................................................... 61 3.3 System Control Register (SYSCR) ................................................................................... 62 3.4 Operating Mode Descriptions ........................................................................................... 64 3.4.1 Mode 1................................................................................................................. 64 3.4.2 Mode 2................................................................................................................. 64 3.4.3 Mode 3................................................................................................................. 64 3.4.4 Mode 4................................................................................................................. 65 3.4.5 Mode 5................................................................................................................. 65 3.4.6 Mode 6................................................................................................................. 65 3.4.7 Mode 7................................................................................................................. 65 3.5 Pin Functions in Each Operating Mode ............................................................................ 66 3.6 Memory Map in Each Operating Mode ............................................................................ 67 3.6.1 Note on Reserved Areas ...................................................................................... 67 Section 4 Exception Handling ......................................................................................... 73 4.1 Overview........................................................................................................................... 73 4.1.1 Exception Handling Types and Priority............................................................... 73 4.1.2 Exception Handling Operation ............................................................................ 73 4.1.3 Exception Vector Table ....................................................................................... 74 4.2 Reset ................................................................................................................................. 76 4.2.1 Overview.............................................................................................................. 76 4.2.2 Reset Sequence .................................................................................................... 76 4.2.3 Interrupts after Reset............................................................................................ 79 4.3 Interrupts........................................................................................................................... 80 4.4 Trap Instruction ................................................................................................................ 81 4.5 Stack Status after Exception Handling.............................................................................. 82 4.6 Notes on Stack Usage ....................................................................................................... 83 |
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