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R5F2123AJFP Datasheet(PDF) 11 Page - Renesas Technology Corp |
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R5F2123AJFP Datasheet(HTML) 11 Page - Renesas Technology Corp |
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11 / 549 page  A - 4 14.4 Timer RE ............................................................................................................................................... 267 14.4.1 Output Compare Mode ..................................................................................................................... 268 14.4.2 Notes on Timer RE ........................................................................................................................... 274 15. Serial Interface ............................................................................................................................ 275 15.1 Clock Synchronous Serial I/O Mode ..................................................................................................... 281 15.1.1 Polarity Select Function .................................................................................................................... 284 15.1.2 LSB First/MSB First Select Function ............................................................................................... 284 15.1.3 Continuous Receive Mode ................................................................................................................ 285 15.2 Clock Asynchronous Serial I/O (UART) Mode .................................................................................... 286 15.2.1 Bit Rate ............................................................................................................................................. 290 15.3 Notes on Serial Interface ....................................................................................................................... 291 16. Clock Synchronous Serial Interface ............................................................................................ 292 16.1 Mode Selection ...................................................................................................................................... 292 16.2 Clock Synchronous Serial I/O with Chip Select (SSU) ........................................................................ 293 16.2.1 Transfer Clock .................................................................................................................................. 302 16.2.2 SS Shift Register (SSTRSR) ............................................................................................................. 304 16.2.3 Interrupt Requests ............................................................................................................................. 305 16.2.4 Communication Modes and Pin Functions ....................................................................................... 306 16.2.5 Clock Synchronous Communication Mode ...................................................................................... 307 16.2.6 Operation in 4-Wire Bus Communication Mode .............................................................................. 314 16.2.7 SCS Pin Control and Arbitration ...................................................................................................... 320 16.2.8 Notes on Clock Synchronous Serial I/O with Chip Select ............................................................... 321 16.3 I2C Bus Interface ................................................................................................................................... 322 16.3.1 Transfer Clock .................................................................................................................................. 332 16.3.2 Interrupt Requests ............................................................................................................................. 333 16.3.3 I2C Bus Interface Mode .................................................................................................................... 334 16.3.4 Clock Synchronous Serial Mode ...................................................................................................... 345 16.3.5 Noise Canceller ................................................................................................................................. 348 16.3.6 Bit Synchronization Circuit .............................................................................................................. 349 16.3.7 Examples of Register Setting ............................................................................................................ 350 16.3.8 Notes on I2C Bus Interface ............................................................................................................... 354 17. Hardware LIN .............................................................................................................................. 355 17.1 Features ................................................................................................................................................. 355 17.2 Input/Output Pins .................................................................................................................................. 356 17.3 Register Configuration .......................................................................................................................... 357 17.4 Functional Description .......................................................................................................................... 359 17.4.1 Master Mode ..................................................................................................................................... 359 17.4.2 Slave Mode ....................................................................................................................................... 362 17.4.3 Bus Collision Detection Function ..................................................................................................... 366 17.4.4 Hardware LIN End Processing ......................................................................................................... 367 17.5 Interrupt Requests .................................................................................................................................. 368 17.6 Notes on Hardware LIN ........................................................................................................................ 369 18. CAN Module ............................................................................................................................... 370 18.1 CAN Module-Related Registers ............................................................................................................ 371 18.2 CAN0 Message Box .............................................................................................................................. 372 |
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