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H83067RF Datasheet(PDF) 8 Page - Renesas Technology Corp |
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H83067RF Datasheet(HTML) 8 Page - Renesas Technology Corp |
8 / 963 page Rev. 4.00 Jan 26, 2006 page viii of xxii 2.8.4 Exception-Handling Sequences ........................................................................... 57 2.8.5 Bus-Released State............................................................................................... 58 2.8.6 Reset State............................................................................................................ 58 2.8.7 Power-Down State ............................................................................................... 59 2.9 Basic Operational Timing ................................................................................................. 60 2.9.1 Overview.............................................................................................................. 60 2.9.2 On-Chip Memory Access Timing........................................................................ 60 2.9.3 On-Chip Supporting Module Access Timing ...................................................... 61 2.9.4 Access to External Address Space ....................................................................... 62 Section 3 MCU Operating Modes .................................................................................. 63 3.1 Overview........................................................................................................................... 63 3.1.1 Operating Mode Selection ................................................................................... 63 3.1.2 Register Configuration......................................................................................... 64 3.2 Mode Control Register (MDCR) ...................................................................................... 65 3.3 System Control Register (SYSCR) ................................................................................... 66 3.4 Operating Mode Descriptions ........................................................................................... 68 3.4.1 Mode 1 ................................................................................................................. 68 3.4.2 Mode 2 ................................................................................................................. 68 3.4.3 Mode 3 ................................................................................................................. 68 3.4.4 Mode 4 ................................................................................................................. 69 3.4.5 Mode 5 ................................................................................................................. 69 3.4.6 Mode 6 ................................................................................................................. 69 3.4.7 Mode 7 ................................................................................................................. 69 3.5 Pin Functions in Each Operating Mode ............................................................................ 70 3.6 Memory Map in Each Operating Mode ............................................................................ 71 3.6.1 Note on Reserved Areas....................................................................................... 71 Section 4 Exception Handling ......................................................................................... 79 4.1 Overview........................................................................................................................... 79 4.1.1 Exception Handling Types and Priority ............................................................... 79 4.1.2 Exception Handling Operation............................................................................. 79 4.1.3 Exception Vector Table ....................................................................................... 80 4.2 Reset ................................................................................................................................. 82 4.2.1 Overview.............................................................................................................. 82 4.2.2 Reset Sequence .................................................................................................... 82 4.2.3 Interrupts after Reset............................................................................................ 85 4.3 Interrupts ........................................................................................................................... 86 4.4 Trap Instruction................................................................................................................. 87 4.5 Stack Status after Exception Handling.............................................................................. 88 4.6 Notes on Stack Usage ....................................................................................................... 89 |
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