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7540_M Datasheet(PDF) 10 Page - Renesas Technology Corp

Part # 7540_M
Description  8-BIT CISC SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 740 SERIES
Download  366 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7540_M Datasheet(HTML) 10 Page - Renesas Technology Corp

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7540 Group
List of figures
Fig. 49 Processing of XIN and XOUT pins at on-chip oscillator operation .............................. 1-45
Fig. 50 Structure of MISRG ........................................................................................................ 1-46
Fig. 51 Block diagram of internal clock generating circuit (for ceramic resonator) ........... 1-47
Fig. 52 Block diagram of internal clock generating circuit (for RC oscillation) ................... 1-47
Fig. 53 State transition ................................................................................................................ 1-48
Fig. 54 Programming and testing of One Time PROM version ............................................ 1-53
Fig. 55 Timing chart after an interrupt occurs ......................................................................... 1-55
Fig. 56 Time up to execution of the interrupt processing routine ........................................ 1-55
Fig. 57 A/D conversion equivalent circuit ................................................................................. 1-57
Fig. 58 A/D conversion timing chart .......................................................................................... 1-57
CHAPTER 2 APPLICATION
Fig. 2.1.1 Memory map of registers relevant to I/O port ......................................................... 2-2
Fig. 2.1.2 Structure of Port Pi (i = 0, 2, 3) ................................................................................ 2-3
Fig. 2.1.3 Structure of Port P1 ..................................................................................................... 2-3
Fig. 2.1.4 Structure of Port Pi direction register (i = 0, 2, 3) ................................................. 2-4
Fig. 2.1.5 Structure of Port P1 direction register ...................................................................... 2-4
Fig. 2.1.6 Structure of Pull-up control register .......................................................................... 2-5
Fig. 2.1.7 Structure of Port P1P3 control register .................................................................... 2-5
Fig. 2.1.8 Structure of Interrupt edge selection register .......................................................... 2-6
Fig. 2.1.9 Structure of Interrupt request register 1 ................................................................... 2-6
Fig. 2.1.10 Structure of Interrupt control register 1 .................................................................. 2-7
Fig. 2.1.11 Example of application circuit .................................................................................. 2-7
Fig. 2.1.12 Example of control procedure (1) ............................................................................ 2-8
Fig. 2.1.13 Example of control procedure (2) ............................................................................ 2-9
Fig. 2.2.1 Memory map of registers relevant to timer A ........................................................ 2-13
Fig. 2.2.2 Structure of Port P0 direction register .................................................................... 2-14
Fig. 2.2.3 Structure of Pull-up control register ........................................................................ 2-14
Fig. 2.2.4 Structure of Timer A mode register ......................................................................... 2-15
Fig. 2.2.5 Structure of Timer A register .................................................................................... 2-16
Fig. 2.2.6 Structure of Interrupt edge selection register ........................................................ 2-16
Fig. 2.2.7 Structure of Interrupt request register 1 ................................................................. 2-17
Fig. 2.2.8 Structure of Interrupt request register 2 ................................................................. 2-17
Fig. 2.2.9 Structure of Interrupt control register 1 .................................................................. 2-18
Fig. 2.2.10 Structure of Interrupt control register 2 ................................................................ 2-18
Fig. 2.2.11 Setting method for timer mode .............................................................................. 2-20
Fig. 2.2.12 Example of control procedure ................................................................................ 2-21
Fig. 2.2.13 Setting method for period measurement mode (1) ............................................. 2-22
Fig. 2.2.14 Setting method for period measurement mode (2) ............................................. 2-23
Fig. 2.2.15 Example of peripheral circuit .................................................................................. 2-24
Fig. 2.2.16 Example of control procedure ................................................................................ 2-25
Fig. 2.2.17 Setting method for event counter mode (1) ......................................................... 2-26
Fig. 2.2.18 Setting method for event counter mode (2) ......................................................... 2-27
Fig. 2.2.19 Example of measurement method of frequency .................................................. 2-28
Fig. 2.2.20 Example of control procedure ................................................................................ 2-29
Fig. 2.2.21 Setting method for pulse width HL continuously measurement mode (1) ....... 2-30
Fig. 2.2.22 Setting method for pulse width HL continuously measurement mode (2) ....... 2-31
Fig. 2.2.23 Example of peripheral circuit .................................................................................. 2-32
Fig. 2.2.24 Operation timing when ringing pulse is input ...................................................... 2-32
Fig. 2.2.25 Example of control procedure (1) .......................................................................... 2-33
Fig. 2.2.26 Example of control procedure (2) .......................................................................... 2-34


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