PIN DESCRIPTION

N°

NAME

TYPE

DESCRIPTION

1

GND1

Ground pin dedicated to the digital periphery.

2

VDD1

Supply pin dedicated to the digital periphery.

3

TESTEN

I

Test Enable (Input). When active, puts the chip into test mode and

muxes the XTI clock to all flip-flops. When TEST_SE is also

active, the scan chain shifting is enabled.

4

TESTSE

I

SCAN Enable (Input). When active with TESTEN also active,

controls the shifting of the internal scan chains. When active with

TESTEN not active, sets all tri-state outputs into hi-impedance

mode

5

NRESET

I

System Reset (Input). A low level applied to NRESET input

initializes the IC.

6

SCKM/DSP0_GPIO0

I/O

I

Purpose I/O (Input/Output). Clock line for I

input. If SPI interface is enabled, behaves as SPI bit clock.

Optionally it can be used as general purpose I/O controlled by

DSP0.

7

MISOM/DSP0_GPIO1

I/O

I

Serial Data (Input/Output)/General Purpose I/O (Input/Output).

Data line for I

behaves as Serial Data Input when in SPI Master Mode and Serial

Data Output when in SPI Slave Mode. Optionally it can be used as

general purpose I/O controlled by DSP0.

8

MOSIM/DSP0_GPIO2

I/O

SPI Master Output Slave Input Serial Data (Input/Output)/General

Purpose I/O (Input/Output). Serial Data Output when in SPI

Master Mode and Serial Data Input when in SPI Slave Mode.

Optionally it can be used as general purpose I/O controlled by

DSP0.

9

SSM/DSP0_GPIO3

I

SPI Slave Select (Input)/General Purpose I/O (Input/Output). If SPI

is enabled, behaves as Slave Select line for SPI bus. Optionally it

can be used as general purpose I/O controlled by DSP0.

10

SCKD/DSP0_GPIO4

I

SPI Bit Clock (Input)/General Purpose I/O (Input/Output). SPI bit

clock. Schmitt trigger input. Optionally it can be used as general

purpose I/O controlled by DSP0.

11

MISOD/DSP0_GPIO5

I/O

SPI Master Input Slave Output Serial Data (Input/Output)/General

Purpose I/O (Input/Output). Schmitt trigger input. Behaves as

Serial Data Input when in SPI Master Mode and Serial Data

Output when in SPI Slave Mode. Optionally it can be used as

general purpose I/O controlled by DSP0.

12

MISOD/DSP0_GPIO6

I/O

SPI Master Output Slave Input Serial Data (Input/Output)/General

Purpose I/O (Input/Output). Serial Data Output when in SPI

Master Mode and Serial Data Input when in SPI Slave Mode.

Optionally it can be used as general purpose I/O controlled by

DSP0.

13

SSD/DSP0_GPIO7

I

SPI Slave Select (Input)/General Purpose I/O (Input/Output).

Behaves as Slave Select line for SPI bus. Optionally it can be

used as general purpose I/O controlled by DSP0.

14

CLKIN

I

Clock Input pin (Input). Clock from external digital audio source to

synchronize the internal PLL.

15

AVDD

audio source to synchronize the internal PLL.

16

XTI

I

Crystal Oscillator Input (Input). External Clock Input or crystal

Oscillator input.

17

XTO

O

Crystal Oscillator Output (Output). Crystal Oscillator output drive.

18

AGND

Ground pin dedicated to the PLL

19

RDSINT/DSP1_GPIO4

O

RDS bit/block interrupt (Output)/General Purpose I/O

(Input/Output). Provides an interrupt to the main micro. Optionally

it can be used as general purpose I/O controlled by DSP1.

TDA7500

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