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IHLP-1616BZ-01 Datasheet(PDF) 1 Page - Vishay Siliconix |
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IHLP-1616BZ-01 Datasheet(HTML) 1 Page - Vishay Siliconix |
1 / 3 page Low Profile, High Current Inductor www.vishay.com For technical questions, contact: magnetics@vishay.com Document Number: 34195 10 Revision: 21-Jan-08 IHLP-1616BZ-01 Vishay Dale FEATURES • Shielded construction • Frequency range up to 5.0 MHz • Lowest DCR/µH, in this package size • Handles high transient current spikes without saturation • Ultra low buzz noise, due to composite construction • 100 % lead (Pb)-free and RoHS compliant RoHS COMPLIANT Manufactured under one or more of the following: US Patents; 6,198,375/6,204,744/6,449,829/6,460,244. Several foreign patents, and other patents pending. NOTES: 1. All test data is referenced to 25 °C ambient 2. Operating Temperature Range - 55 °C to + 125 °C 3. DC current (A) that will cause an approximate ΔT of 40 °C 4. DC current (A) that will cause Lo to drop approximately 20 % 5. The part temperature (ambient + temp rise) should not exceed 125 °C under worst case operating conditions. Circuit design, component placement, PWB trace size and thickness, airflow and other cooling provisions all affect the part temperature. Part temperature should be verified in the end application. STANDARD ELECTRICAL SPECIFICATIONS Lo INDUCTANCE µH ± 20 % at 100 kHz, 0.25 V, 0 A DCR m Ω TYPICAL 25 °C DCR m Ω MAX 25 °C HEAT RATING CURRENT DC AMPS3 TYPICAL SATURATION CURRENT DC AMPS4 TYPICAL 0.10 4.50 5.00 11.0 35.0 0.22 7.30 8.00 13.0 24.0 0.47 16.0 18.0 5.60 11.50 1.00 33.0 37.0 3.75 8.50 2.20 80.0 90.0 2.85 6.00 APPLICATIONS • PDA/Notebook/Desktop/Server applications • High current POL converters • Low profile, high current power supplies • Battery powered devices • DC/DC converters in distributed power systems • DC/DC converter for Field Programmable Gate Array (FPGA) DIMENSIONS in inches [millimeters] MODEL SIZE INDUCTANCE VALUE PACKAGE CODE SERIES IH L P 1 6 6 1 0 BZ E R R4 7 M 1 INDUCTANCE TOLERANCE IHLP-1616BZ-01 0.47 µH ± 20 % ER e3 MODEL INDUCTANCE INDUCTANCE PACKAGE JEDEC LEAD (Pb)-FREE VALUE TOLERANCE CODE STANDARD GLOBAL PART NUMBER DESCRIPTION 0.160 ± 0.010 [4.06 ± 0.254] 0.175 ± 0.010 [4.45 ± 0.254] 0.030 ± 0.012 [0.76 ± 0.30] 0.079 [2.0] Max. 0.065 [1.65] 0.090 [2.30] 0.195 [4.95] Typical Pad Layout 0.080 ± 0.002 [2.0 ± 0.05] |
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