Electronic Components Datasheet Search |
|
PPC5604BECLU Datasheet(PDF) 8 Page - Freescale Semiconductor, Inc |
|
PPC5604BECLU Datasheet(HTML) 8 Page - Freescale Semiconductor, Inc |
8 / 98 page MPC560xS Microcontroller Data Sheet Data Sheet, Rev. 1 Preliminary—Subject to Change Without Notice Overview Freescale Semiconductor 8 Table 2. MPC5606S Series Block Summary Block Function 16-channel 2nd-generation Direct Memory Access (eDMA) Second-generation platform module capable of performing complex data transfers with minimal intervention from a host processor via “n” programmable channels AHB crossbar switch “lite” (XBAR-Lite) Internal busmaster Analog-to-digital converter (ADC) 16-channel, 10-bit analog to digital converter Boot assist module (BAM) A block of read-only memory containing VLE code which is executed according to the boot mode of the device Clock generation module (CGM) Provides logic and control required for the generation of system and peripheral clocks Clock monitor unit (CMU) Monitors clock source (internal and external) integrity Display control unit (DCU) Generates all signals required to drive a TFT LCD display, allowing blending of data of up to 16 layers; can also display digital video/graphics in the background plane Deserial serial peripheral interface (DSPI) Provides a synchronous serial interface for communication with external devices QuadSPI (QSPI) Provides a synchronous serial bus for communication with external serial flash memory and is optionally configurable as a third DSPI module Enhanced modular input output system (eMIOS) Provides the functionality to generate or measure events Flash memory Provides non-volatile storage for program code, constants and variables FlexCAN (controller area network) Supports the standard CAN communications protocol FMPLL (frequency-modulated phase-locked loop) Two FMPLLs generate high-speed system clocks and support programmable frequency modulation Inter-integrated circuit (I2C™) bus A two wire bidirectional serial bus that provides a simple and efficient method of data exchange between devices Interrupt controller (INTC) Provides priority-based preemptive scheduling of interrupt requests JTAG controller Provides the means to test chip functionality and connectivity while remaining transparent to system logic when not in test mode LCD driver module Provides 40 × 4 (frontplane drivers × backplane drivers) or 6 × 38 driver configuration for driving LCD segments LINflex controller Manages a high number of LIN (Local Interconnect Network protocol) messages efficiently with a minimum of CPU load Memory protection unit (MPU) Provides hardware access control for all memory references generated in a device Error Correction Status Module (ECSM) Provides miscellaneous control functions including program-visible information about the platform configuration and revision levels, a reset status register, wakeup control for exiting sleep modes, and generic access error information for the processor core |
Similar Part No. - PPC5604BECLU |
|
Similar Description - PPC5604BECLU |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |