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PESD5V0U1UB Datasheet(PDF) 6 Page - NXP Semiconductors |
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PESD5V0U1UB Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 12 page PESD5V0U1UA_UB_UL_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 30 October 2008 6 of 12 NXP Semiconductors PESD5V0U1UA/UB/UL Ultra low capacitance unidirectional ESD protection diodes 7. Application information The PESD5V0U1Ux series is designed for the protection of one unidirectional data or signal line from the damage caused by ESD. The devices may be used on lines where the signal polarities are either positive or negative with respect to ground. Circuit board layout and protection device placement Circuit board layout is critical for the suppression of ESD and Electrical Fast Transient (EFT). The following guidelines are recommended: 1. Place the device as close to the input terminal or connector as possible. 2. The path length between the device and the protected line should be minimized. 3. Keep parallel signal paths to a minimum. 4. Avoid running protected conductors in parallel with unprotected conductors. 5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops. 6. Minimize the length of the transient return path to ground. 7. Avoid using shared transient return paths to a common ground point. 8. Ground planes should be used whenever possible. For multilayer PCBs, use ground vias. 8. Test information 8.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. Fig 5. Application diagram 006aab251 GND line to be protected (positive signal polarity) DUT unidirectional protection of one line GND line to be protected (negative signal polarity) DUT |
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