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ATMEGA8-16PU Datasheet(PDF) 17 Page - ATMEL Corporation |
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ATMEGA8-16PU Datasheet(HTML) 17 Page - ATMEL Corporation |
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17 / 308 page  17 2486T–AVR–05/08 ATmega8(L) AVR ATmega8 Memories This section describes the different memories in the ATmega8. The AVR architecture has two main memory spaces, the Data memory and the Program Memory space. In addition, the ATmega8 features an EEPROM Memory for data storage. All three memory spaces are linear and regular. In-System Reprogrammable Flash Program Memory The ATmega8 contains 8K bytes On-chip In-System Reprogrammable Flash memory for pro- gram storage. Since all AVR instructions are 16- or 32-bits wide, the Flash is organized as 4K x 16 bits. For software security, the Flash Program memory space is divided into two sections, Boot Program section and Application Program section. The Flash memory has an endurance of at least 10,000 write/erase cycles. The ATmega8 Pro- gram Counter (PC) is 12 bits wide, thus addressing the 4K Program memory locations. The operation of Boot Program section and associated Boot Lock Bits for software protection are described in detail in “Boot Loader Support – Read-While-Write Self-Programming” on page 209. “Memory Programming” on page 222 contains a detailed description on Flash Program- ming in SPI- or Parallel Programming mode. Constant tables can be allocated within the entire Program memory address space (see the LPM – Load Program memory instruction description). Timing diagrams for instruction fetch and execution are presented in “Instruction Execution Tim- ing” on page 13. Figure 7. Program Memory Map $000 $FFF Application Flash Section Boot Flash Section |
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