10

FN6829.3

July 9, 2009

The PWM operation is initialized by the clock from the

oscillator. The P-Channel MOSFET is turned on at the

beginning of a PWM cycle and the current in the P-Channel

MOSFET starts ramping up. When the sum of the CSA

output and the compensation slope reaches the control

reference of the current loop, the PWM comparator COMP

sends a signal to the PWM logic to turn off the P-Channel

MOSFET and to turn on the N-Channel MOSFET. The

N-MOSFET remains on till the end of the PWM cycle. Figure 23

shows the typical operating waveforms during the normal PWM

operation. The dotted lines illustrate the sum of the slope

compensation ramp and the CSA output.

The output voltage is regulated by controlling the reference

voltage to the current loop. The bandgap circuit outputs a

0.8V reference voltage to the voltage control loop. The

feedback signal comes from the FB pin. The soft-start block

only affects the operation during the start-up and will be

discussed separately in “Soft-Start” on page 11. The EAMP

is a transconductance amplifier, which converts the voltage

error signal to a current output. The voltage loop is internally

compensated by a RC network. The maximum EAMP

voltage output is precisely clamped to the bandgap voltage.

Skip Mode (PFM Mode)

Under light load condition, ISL9104, ISL9104A automatically

enters a pulse-skipping mode to minimize the switching loss

by reducing the switching frequency. Figure 24 illustrates the

skip mode operation. A zero-cross sensing circuit (as shown

in Figure 22) monitors the current flowing through SW node

for zero crossing. When it is detected to cross zero for

16-consecutive cycles, the regulator enters the skip mode.

During the 16-consecutive cycles, the inductor current could

be negative. The counter is reset to zero when the sensed

current flowing through SW node does not cross zero during

any cycle within the 16-consecutive cycles. Once ISL9104,

ISL9104A enters the skip mode, the pulse modulation starts

being controlled by the SKIP comparator shown in Figure 22.

Each pulse cycle is still synchronized by the PWM clock. The

P-Channel MOSFET is turned on at the rising edge of clock

and turned off when its current reaches ~20% of the peak

current limit. As the average inductor current in each cycle is

higher than the average current of the load, the output

voltage rises cycle over cycle. When the output voltage is

sensed to reach 1.5% above its nominal voltage, the

P-Channel MOSFET is turned off immediately and the

inductor current is fully discharged to zero and stays at zero.

The output voltage reduces gradually due to the load current

discharging the output capacitor. When the output voltage

drops to the nominal voltage, the P-Channel MOSFET will

be turned on again, repeating the previous operations.

The regulator resumes normal PWM mode operation when

the output voltage is sensed to drop below 1.5% of its

nominal voltage value.

Enable

The enable (EN) pin allows user to enable or disable the

converter for purposes such as power-up sequencing. With

EN pin pulled to high, the converter is enabled and the

internal reference circuit wakes up first and then the soft

start-up begins. When EN pin is pulled to logic low, the

converter is disabled, both P-Channel MOSFET and

N-Channel MOSFETS are turned off, and the output

capacitor is discharged through internal discharge path.

FIGURE 23. PWM OPERATION WAVEFORMS

d

16 CYCLES

CLOCK

0

20% PEAK CURRENT LIMIT

FIGURE 24. SKIP MODE OPERATION WAVEFORMS

ISL9104, ISL9104A