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CDCLVP215RHBR Datasheet(PDF) 2 Page - Texas Instruments |
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CDCLVP215RHBR Datasheet(HTML) 2 Page - Texas Instruments |
2 / 10 page VBB 30 31 29 28 27 26 23 22 24 21 20 19 18 17 15 14 13 12 11 10 5 CLKA CLKA CLKB CLKB 3 4 6 7 + QA0 QA1 QA2 QA3 QA4 QB0 QB1 QB2 QB3 QB4 QA0 QA1 QA2 QA3 QA4 QB0 QB2 QB1 QB4 QB3 + CDCLVP215 SCAS853A – APRIL 2008 – REVISED OCTOBER 2008.................................................................................................................................................... www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. PIN FUNCTIONS PIN DESCRIPTION NAME NO. NC 2 Not connected CLKA, CLKA 3, 4 Differential LVECL/LVPECL input pair CLKB, CLKB 6, 7 Differential LVECL/LVPECL input pair Q [A0:A4] 22, 24, 27, 29, 31 LVECL/LVPECL clock outputs, these outputs provide low-skew copies of CLKA. Q [A0:A4] 21,23, 26, 28, 30 LVECL/LVPECL complementary clock outputs, these outputs provide low-skew copies of CLKA. Q [B0:B4] 11, 13, 15, 18, 20 LVECL/LVPECL clock outputs, these outputs provide low-skew copies of CLKB. Q [B0:B4] 10, 12, 14, 17, 19 LVECL/LVPECL complementary clock outputs, these outputs provide low-skew copies of CLKB. VBB 5 Reference voltage output for single-ended input operation VCC 1, 9, 16, 25, 32 Supply voltage VEE 8 Device ground or negative supply voltage in ECL mode The PowerPAD™ of the QFN32 package is thermally connected to the die for improved heat transfer out of the package. This pad is electrically connected to VEE. • CLKn pull down resistor 75 kΩ • CLKn pull up resistor 37.5 kΩ • CLKn pull down resistor 50 kΩ 2 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): CDCLVP215 |
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