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SRDA3.3-6.T Datasheet(PDF) 5 Page - Semtech Corporation |
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SRDA3.3-6.T Datasheet(HTML) 5 Page - Semtech Corporation |
5 / 9 page 5 2008 Semtech Corp. www.semtech.com PROTECTION PRODUCTS PROTECTION PRODUCTS SRDA3.3-6 and SRDA05-6 Device Connection Options for Protection of Six High- Speed Lines The SRDA TVS is designed to protect four data lines from transient overvoltages by clamping them to a fixed reference. When the voltage on the protected line exceeds the reference voltage (plus diode V F) the steering diodes are forward biased, conducting the transient current away from the sensitive circuitry. Data lines are connected at pins 1, 2, 4, 5, 6 and 7. The negative reference is connected at pin 8. These pins should be connected directly to a ground plane on the board for best results. The path length is kept as short as possible to minimize parasitic inductance. The positive reference is connected at pins 2 and 3. In the case of the SRDA3.3-6, pins 2 and 3 are connected internally to the cathode of the low voltage TVS. It is not recommended that these pins be directly connected to a DC source greater than the snap-back votlage (V SB) as the device can latch on as described below. EPD TVS Characteristics These devices are constructed using Semtech’s proprietary EPD technology. By utilizing the EPD tech- nology, the SRDA3.3-6 can effectively operate at 3.3V while maintaining excellent electrical characteristics. The EPD TVS employs a complex nppn structure in contrast to the pn structure normally found in tradi- tional silicon-avalanche TVS diodes. Since the EPD TVS devices use a 4-layer structure, they exhibit a slightly different IV characteristic curve when compared to conventional devices. During normal operation, the device represents a high-impedance to the circuit up to the device working voltage (V RWM). During an ESD event, the device will begin to conduct and will enter a low impedance state when the punch through voltage (V PT) is exceeded. Unlike a conventional device, the low voltage TVS will exhibit a slight negative resistance characteristic as it conducts current. This characteris- tic aids in lowering the clamping voltage of the device, but must be considered in applications where DC voltages are present. When the TVS is conducting current, it will exhibit a slight “snap-back” or negative resistance characteris- tics due to its structure. This point is defined on the Data Line Protection Using Internal TVS Diode as Reference Applications Information curve by the snap-back voltage (V SB) and snap-back current (I SB). To return to a non-conducting state, the current through the device must fall below the I SB (approximately <50mA) and the voltage must fall below the V SB (normally 2.8 volts for a 3.3V device). If a 3.3V TVS is connected to 3.3V DC source, it will never fall below the snap-back voltage of 2.8V and will therefore stay in a conducting state. EPD TVS IV Characteristic Curve IPP I SB IPT I R VRWM V V PT VC VBRR I BRR SB |
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