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SCG102A-DFF-A4P6 Datasheet(PDF) 3 Page - Connor-Winfield Corporation |
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SCG102A-DFF-A4P6 Datasheet(HTML) 3 Page - Connor-Winfield Corporation |
3 / 8 page Data Sheet #: SG076 Page 3 of 8 Rev: 00 Date: 4/11/07 © Copyright 2007 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Specifications Table 2 Symbol Parameter Minimum Nominal Maximum Units Notes f IN Available Input Frequencies CMOS 8 k 100 M Hz PECL 1 M 100 M Hz f OUT Output Frequencies(LVPECL) 77.76 M 170 M Hz Vcc Supply Voltage 3.135 3.3 3.465 Volts I CC Supply Current 75 100 mA CLKIN Input Logic A = CMOS CMOS 1 D = PECL PECL CLKOUT Output Logic F = Comp. PECL PECL V OH 2.275 V V OL 1.68 V T R/TF Rise/Fall Time 0.5 1 ns SYM Output Symmetry 45 55 % BW Bandwidth 20 Hz J GEN Jitter Generation RMS 0.5 1 ps (12 kHz - 20 MHz) J TRAN Jitter Transfer 0.1 dB 2 APR Input Frequency Tracking ±50 ppm T OP Operating Temperature F = -40 85 °C C =0 70 °C NOTES: 1.0: Only HCMOS and LVHCMOS is supported for input frequencies < 1MHz 2.0: GR-253-CORE, Sec. 5.6.2.1.2 Pin Description Table 3 Pin # Connection Description 1 CLKIN Input Frequency - The SCG102A AC couples the input , this means that the unit is capable of handling HCMOS, LVCMOS, PECL, LVPECL input signals. 2 GND Ground 3 Lock Detector Logic “1” indicates that the unit is locked to the input reference Logic “0” indicates that the reference is lost or out of lock range 4 VCXO Monitor Control voltage level for the PECL oscillator (Between 0.3V and 3.0V when locked) 5 ---- Missing 6 NC No connection 7 GND Ground 8 Enable/Disable Logic “0” (or no connect) = Output Enabled Logic “1” = Output Disabled (Tri-Stated) 9 Out Output 10 COut Complementary Output 11 NC No connection 12 Select A Input Frequency Select Control Pin. See Table 4. 13 Select B Input Frequency Select Control Pin. See Table 4. 14 NC No connection 15 GND Ground 16 V CC Power supply voltage (3.3 Vdc ± 5%) |
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Similar Description - SCG102A-DFF-A4P6 |
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