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HV66PJ Datasheet(PDF) 1 Page - Supertex, Inc

Part # HV66PJ
Description  32-Channel LCD Driver with Separate Backplane Output
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Manufacturer  SUTEX [Supertex, Inc]
Direct Link  http://www.supertex.com
Logo SUTEX - Supertex, Inc

HV66PJ Datasheet(HTML) 1 Page - Supertex, Inc

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02/96/022
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
Device
Features
❏ Processed with HVCMOS® technology
❏ 32 push-pull CMOS output up to 32V
❏ Low power level shifting
❏ Source/sink current minimum 1mA
❏ Shift register speed 5MHz
❏ Latched data outputs
❏ Bidirectional shift register (DIR)
❏ Backplane output
32-Channel LCD Driver
with Separate Backplane Output
HV66
General Description
Not recommended for new designs.
The HV66 is a low-voltage serial to high-voltage parallel converter
with push-pull outputs. This device has been designed for use as
a driver circuit for LCD displays. It can also be used in any
application requiring multiple output high-voltage current sourc-
ing and sinking capabilities. The inputs are fully CMOS compat-
ible.
The device consists of a 32-bit shift register, 32 latches, and
control logic to perform blanking and polarity control of the
outputs. HVout1 is connected to the first stage of the shift register.
Data is shifted through the shift register on the logic rising
transition of the clock. A DIR pin causes data shifting counter-
clockwise when grounded and clockwise when connected to V
DD.
A data output buffer is provided for cascading devices. This output
reflects the current status of the last bit of the shift register.
Operation of the shift register is not affected by the LE (latch
enable), BL (blank) or the POL (polarity) inputs. Transfer of data
from the shift register to the latch occurs when the LE (latch
enable) input is high. The data in the latch is stored after LE
transitions from high to low.
The blank signal, BL, when pulled low, will set all outputs to the
same state as the BPOUT. If this signal is left open then the BL
defaults to a high state.
Ordering Information
Package Options
44 Lead Quad
44 J-Lead Quad
Die
Plastic Gullwing
Plastic Chip Carrier
in waffle pack
HV66
HV66PG
HV66PJ
HV66X
Absolute Maximum Ratings1
Supply voltage, VDD
2
-0.5V to +7.0V
Output voltage, V
PP
2
-0.5V to +35V
Logic input levels2
-0.5V to V
DD + 0.5V
Ground current3
1.5A
Continuous total power dissipation4
1200mW
Operating temperature range
-40°C to +85°C
Storage temperature range
-65°C to +125°C
Lead temperature 1.6mm (1/16 inch)
260°C
from case for 10 seconds
Notes:
1. Device will survive (but operation may not be specified or guaranteed) at
these extremes.
2. All voltages are referenced to VSS.
3. Duty cycle is limited by the total power dissipated in the package.
4. For operation above 25°C ambient derate linearly to 85°C at 20mW/°C.


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