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HV9906LG Datasheet(PDF) 3 Page - Supertex, Inc |
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HV9906LG Datasheet(HTML) 3 Page - Supertex, Inc |
3 / 10 page HV9906 Pinout 1 2 3 45 6 7 8 HV9906 +Vin Vdd AGND PS GATE Von PGND NS Pin Description +VIN – This pin is the input to the internal linear regulator. VON –The voltage applied to this pin by a resistor voltage divider from +VIN controls the on time (pulse width) of the gate output. VDD – This pin is the output of the internal linear regulator and the supply pin for the internal circuits. It must be bypassed with a low ESR capacitor to provide a low impedance path for the gate drive and be capable of storing sufficient energy so that the voltage does not decay below the UVLO threshold during the time when the input voltage is below the minimum required by the regulator. AGND – This pin is the common connection for analog circuits. GATE – This pin is the output for driving the gate of an external N- channel MOSFET. PGND – This is the common connection for the GATE drive circuit. NS – This pin is the negative terminal of the differential sense feedback circuit. PS – This pin is the positive terminal of the differential sense feedback circuit. __________________________________________________________________________________________________________________ Functional Block Diagram VCO C C Delay Delay High Voltage Regulator UVLO and POR Bandgap Reference +Vin Von Vdd AGND GATE PGND Reset Pulse Sample Pulse Vdd Vdd 1V 1V 1V Vdd Vref Q R S Vref Q _ NS PS Driver 3 07/23/02 Supertex, Inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 FAX: (408) 222-4895 www.supertex.com |
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