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EP2C8A8U324I7N Datasheet(PDF) 96 Page - Altera Corporation |
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EP2C8A8U324I7N Datasheet(HTML) 96 Page - Altera Corporation |
96 / 168 page 5–6 Altera Corporation Cyclone II Device Handbook, Volume 1 February 2008 Operating Conditions SSTL-18 class II 1.7 1.8 1.9 0.833 0.9 0.969 VREF – 0.125 (DC) VREF – 0.25 (AC) VREF + 0.125 (DC) VREF + 0.25 (AC) 1.8-V HSTL class I 1.71 1.8 1.89 0.85 0.9 0.95 VREF – 0.1 (DC) VREF – 0.2 (AC) VREF + 0.1 (DC) VREF + 0.2 (AC) 1.8-V HSTL class II 1.71 1.8 1.89 0.85 0.9 0.95 VREF – 0.1 (DC) VREF – 0.2 (AC) VREF + 0.1 (DC) VREF + 0.2 (AC) 1.5-V HSTL class I 1.425 1.5 1.575 0.71 0.75 0.79 VREF – 0.1 (DC) VREF – 0.2 (AC) VREF + 0.1 (DC) VREF + 0.2 (AC) 1.5-V HSTL class II 1.425 1.5 1.575 0.71 0.75 0.79 VREF – 0.1 (DC) VREF – 0.2 (AC) VREF + 0.1 (DC) VREF + 0.2 (AC) Note to Table 5–6: (1) Nominal values (Nom) are for TA = 25° C, VCCINT = 1.2 V, and VCCIO = 1.5, 1.8, 2.5, and 3.3 V. Table 5–7. DC Characteristics of User I/O Pins Using Single-Ended Standards Notes (1), (2) (Part 1 of 2) I/O Standard Test Conditions Voltage Thresholds IOL (mA) IOH (mA) Maximum VOL (V) Minimum VOH (V) 3.3-V LVTTL 4 –4 0.45 2.4 3.3-V LVCMOS 0.1 –0.1 0.2 VCCIO – 0.2 2.5-V LVTTL and LVCMOS 1–1 0.4 2.0 1.8-V LVTTL and LVCMOS 2–2 0.45 VCCIO – 0.45 1.5-V LVTTL and LVCMOS 2–2 0.25 × VCCIO 0.75 × VCCIO PCI and PCI-X 1.5 –0.5 0.1 × VCCIO 0.9 × VCCIO SSTL-2 class I 8.1 –8.1 VTT – 0.57 VTT + 0.57 SSTL-2 class II 16.4 –16.4 VTT – 0.76 VTT + 0.76 SSTL-18 class I 6.7 –6.7 VTT – 0.475 VTT + 0.475 SSTL-18 class II 13.4 –13.4 0.28 VCCIO – 0.28 1.8-V HSTL class I 8 –8 0.4 VCCIO – 0.4 1.8-V HSTL class II 16 –16 0.4 VCCIO – 0.4 Table 5–6. Recommended Operating Conditions for User I/O Pins Using Single-Ended I/O Standards Note (1) (Part 2 of 2) I/O Standard VCCIO (V) VREF (V) VIL (V) VIH (V) Min Typ Max Min Typ Max Max Min |
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