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LT5524 Datasheet(PDF) 9 Page - Linear Technology |
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LT5524 Datasheet(HTML) 9 Page - Linear Technology |
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9 / 16 page  9 LT5524 5524f Input Interface For the lowest noise and highest linearity, the LT5524 should be driven with a differential input signal. Single- ended drive will severely degrade linearity and noise performance. Example input matching networks are shown in Figures 3 and 4. Input matching network design criteria are: • DC block the LT5524 internal bias voltage (see Input Bias Voltage section for DC coupling information) • Match the source impedance to the LT5524, RIN ≅ 122Ω • Provide well balanced differential input drive (capacitor C2 in Figure 4) • Minimize insertion loss to avoid degrading the noise figure (NF) Note: In Figure 5, (choke) inductors may be placed in parallel with or used to replace resistors R1 and R2, thus eliminating the DC voltage drop across these resistors. APPLICATIO S I FOR ATIO + – RIN 122Ω IN+ VSRC LT5524 LT5524 F03 C1 R1 50Ω R2 50Ω C2 IN– Figure 3. Input Capacitively-Coupled to a Differential Source + – RIN 122Ω IN+ C2 0.33µF LT5524 LT5524 F04 RSRC 50Ω T1 1:2 • • • VSRC IN– Figure 4. Input Transformer-Coupled to a Single-Ended Source Output Interface The output interface network provides an impedance transformation between the actual load impedance, RLOAD, and the LT5524 output loading, ROUT, chosen to maximize power or linearity, or to minimize output noise, or for some other criteria as explained in the following sections. Two examples of output matching networks are shown in Figures 5 and 6 (as implemented in the LT5524 demo boards). Figure 5. Output Impedance-Matched and Capacitively Coupled to a Differential Load + – RIN 122Ω IN+ LT5524 C1 C3 C2 R1 51Ω R2 51Ω VOSUP RLOAD 50Ω RLOAD 50Ω ROUT LT5524 F05 IN– Figure 6. Output Impedance-Matched and Transformer-Coupled to a Single-Ended Load + – RIN 122Ω IN+ LT5524 C1 RMATCH 255Ω (OPTIONAL) VOSUP RLOAD 50Ω T2 4:1 ROUT LT5524 F06 IN– • • • Output network design criteria are: • Provide DC isolation between the LT5524 DC output voltage and RLOAD. • Provide a path for the output DC current from the output voltage source VOSUP. • Provide an impedance transformation, if required, be- tween the load impedance, RLOAD, and the optimum ROUT loading. • Set the bandwidth of the output network. • Optional: Provide board output impedance matching using resistor RMATCH (when driving a transmission line). • Use high linearity passive parts to avoid introducing noninearity. Note that there is a noise penalty of up to 6dB when using power delivered by only one output in Figure 5. |
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