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A1440AA-1PG208C Datasheet(PDF) 30 Page - Actel Corporation |
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A1440AA-1PG208C Datasheet(HTML) 30 Page - Actel Corporation |
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30 / 68 page  1-204 A1425A, A14V25A Timing Characteristics (continued) (Worst-Case Commercial Conditions) Note: 1. Routing delays are for typical designs across worst-case operating conditions. These parameters should be used for estimating device performance. Post-route timing analysis or simulation is required to determine actual worst-case performance. Post-route timing is based on actual routing delay measurements performed on the device prior to shipment. I/O Module Input Propagation Delays ‘–3’ Speed ‘–2’ Speed ‘–1’ Speed ‘Std’ Speed 3.3V Speed Parameter Description Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Units tINY Input Data Pad to Y 2.8 3.2 3.6 4.2 5.5 ns tICKY Input Reg IOCLK Pad to Y 4.7 5.3 6.0 7.0 9.2 ns tOCKY Output Reg IOCLK Pad to Y 4.7 5.3 6.0 7.0 9.2 ns tICLRY Input Asynchronous Clear to Y 4.7 5.3 6.0 7.0 9.2 ns tOCLRY Output Asynchronous Clear to Y 4.7 5.3 6.0 7.0 9.2 ns Predicted Input Routing Delays1 tIRD1 FO=1 Routing Delay 0.9 1.0 1.1 1.3 1.7 ns tIRD2 FO=2 Routing Delay 1.2 1.4 1.6 1.8 2.4 ns tIRD3 FO=3 Routing Delay 1.4 1.6 1.8 2.1 2.8 ns tIRD4 FO=4 Routing Delay 1.7 1.9 2.2 2.5 3.3 ns tIRD8 FO=8 Routing Delay 2.8 3.2 3.6 4.2 5.5 ns I/O Module Sequential Timing tINH Input F-F Data Hold (w.r.t. IOCLK Pad) 0.0 0.0 0.0 0.0 0.0 ns tINSU Input F-F Data Setup (w.r.t. IOCLK Pad) 1.8 2.0 2.3 2.7 3.0 ns tIDEH Input Data Enable Hold (w.r.t. IOCLK Pad) 0.0 0.0 0.0 0.0 0.0 ns tIDESU Input Data Enable Setup (w.r.t. IOCLK Pad) 5.8 6.5 7.5 8.6 8.6 ns tOUTH Output F-F Data Hold (w.r.t. IOCLK Pad) 0.7 0.8 0.9 1.0 1.0 ns tOUTSU Output F-F Data Setup (w.r.t. IOCLK Pad) 0.7 0.8 0.9 1.0 1.0 ns tODEH Output Data Enable Hold (w.r.t. IOCLK Pad) 0.3 0.4 0.4 0.5 0.5 ns tODESU Output Data Enable Setup (w.r.t. IOCLK Pad) 1.3 1.5 1.7 2.0 2.0 ns |
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