AK8133

MS0930-E-00

Mar-08

- 5 -

Output clock frequency selection

The AK8133 generates a range of low-jitter and high-accuracy clock frequencies with two built-in PLLs and

provides to up to four assigned outputs. A frequency selection at assigned output pin is configured by

pin-setting of S0 (Pin2), S1 (Pin3), S2(Pin4) and S3 (Pin14).

The selectable frequency is shown in Table 2 and Table2.

Selection Pin

Output Frequency(MHz)

S3(Pin14)

CLK1(Pin 7)

L

36.864

H

24.576

Table 1: CLK1 Clock output Frequency

Selection Pin

Clock Output Frequency (MHz)

Sampling

Frequency

(kHz)

S2

(Pin 4)

S1

(Pin 3)

S0

(Pin 2)

CLK2

256fs

(Pin 8)

CLK3

384fs

(Pin 10)

CLK4

(Pin 11)

48.0

L

L

L

12.288

18.432

33.8688

44.1

L

L

H

11.2896

16.9344

33.8688

32.0

L

H

L

8.192

12.288

33.8688

192.0

L

H

H

49.152

73.728

33.8688

88.2

H

L

L

22.5792

33.8688

33.8688

96.0

H

L

H

24.576

36.864

33.8688

64.0

H

H

L

16.384

24.576

33.8688

16.0/22.05

H

H

H

4.096

8.4672

16.9344

Table 2: CLK2-4 Clock output Frequency