STK672-080-E

No.6507-9/18

• M1, M2, and M3 (Excitation mode and CLK input edge timing selection)

1) Pin circuit type: Built-in pull-up resistor (20k

Ω, typical) CMOS Schmitt trigger structure

2) Function:

M2

0

0

1

1

M1

M3

0

1

0

1

Phase switching clock edge timing

1

2 phase excitation

1-2 phase excitation

W1-2 phase excitation

2W1-2 phase excitation

Rising edge only

0

1-2 phase excitation

W1-2 phase excitation

2W1-2 phase excitation

4W1-2 phase excitation

Rising and falling edges

3) Valid mode setting timing: Applications must not change the mode in the period 5

μs before or after a CLK signal

rising or falling edge.

Mode Setting Acquisition Timing

• RESET (Resets all parts of the system.)

1) Pin circuit type: Built-in pull-up resistor (20k

Ω, typical) CMOS Schmitt trigger structure

2) Function:

- All circuit states are set to their initial values by setting the RESET pin low. (Note that the pulse width must be

at least 10

μs.)

At this time, the A and B phases are set to their origin, regardless of the excitation mode. The output current

goes to about 71% after the reset is released.

3) Notes: When power is first applied to this hybrid IC, Vref must be established by applying a reset. Applications

must apply a power on reset when the VCC2 power supply is first applied.

• Vref (Sets the current level used as the reference for constant-current detection.)

1) Pin circuit type: Analog input structure

2) Function:

- Constant-current control can be applied to the motor excitation current at 100% of the rated current by applying a

voltage less than the control system power supply voltage VCC2 minus 2.5V.

- Applications can apply constant-current control proportional to the Vref voltage, with this value of 2.5V as the

upper limit.

Output Pin Functions

Pin No.

Symbol

Function

Pin circuit type

14

MOI

Phase excitation origin monitor

Standard CMOS structure

Output Signal Functions and Timing

• A, A, B, and B (Motor phase excitation outputs)

1) Function:

- In the 4 phase and 2 phase excitation modes, a 3.75

μs (typical) interval is set up between the A and A and B and

B output signal transition times.

Mode switching timing

Excitation counter up/down

CLK input

System clock

Mode setting

M1 to M3

Mode switching clock

Hybrid IC internal setting state

Phase excitation clock

A13265