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ISL9016IRUMBZ-T Datasheet(PDF) 11 Page - Intersil Corporation

Part # ISL9016IRUMBZ-T
Description  150mA Dual LDO with Low Noise, High PSRR, and Low IQ
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL9016IRUMBZ-T Datasheet(HTML) 11 Page - Intersil Corporation

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All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6832.0
January 22, 2009
Ultra Thin Dual Flat No-Lead Plastic Package (UTDFN)
B
D
A
E
0.15 C
2X
PIN 1
TOP VIEW
0.15 C
2X
REFERENCE
DETAIL A
0.10 C
0.08 C
6X
A3
C
SEATING
PLANE
L
e
46
31
BOTTOM VIEW
SIDE VIEW
0.10
CAB
b6X
DETAIL A
0.127 +0.058
A1
A1
A
0.127±0.008
64
13
M
CO.2
1.00 REF
D2
DAP SIZE 1.30 x 0.76
E2
-0.008
TERMINAL THICKNESS
0.30
1.00
0.45
0.50
0.25
1.25
2.00
1.00
LAND PATTERN 6
L6.1.6x1.6A
6 LEAD ULTRA THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
SYMBOL
MILLIMETERS
NOTES
MIN
NOMINAL
MAX
A
0.45
0.50
0.55
-
A1
-
-
0.05
-
A3
0.127 REF
-
b
0.15
0.20
0.25
-
D
1.55
1.60
1.65
4
D2
0.40
0.45
0.50
-
E
1.55
1.60
1.65
4
E2
0.95
1.00
1.05
-
e
0.50 BSC
-
L
0.25
0.30
0.35
-
Rev. 1 6/06
NOTES:
1. Dimensions are in mm. Angles in degrees.
2. Coplanarity applies to the exposed pad as well as the terminals.
Coplanarity shall not exceed 0.08mm.
3. Warpage shall not exceed 0.10mm.
4. Package length/package width are considered as special
characteristics.
5. JEDEC Reference MO-229.
6. For additional information, to assist with the PCB Land Pattern
Design effort, see Intersil Technical Brief TB389.
ISL9016


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