BQ4015MA-70 datasheet(5/13 Pages) TI

Part #	BQ4015MA-70

Description	512Kx8 Nonvolatile SRAM

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Manufacturer	TI [Texas Instruments]

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5 / 13 page

5

bq4015/Y

AC Test Conditions

Parameter

Test Conditions

Input pulse levels

0V to 3.0V

Input rise and fall times

5 ns

Input and output timing reference levels

1.5 V (unless otherwise specified)

Output load (including scope and jig)

See Figures 1 and 2

Figure 2. Output Load B

Figure 1. Output Load A

Read Cycle (TA = TOPR, VCCmin

≤ VCC ≤ VCCmax)

Symbol

Parameter

-70

-85/-85N

-120/-120N

Unit

Conditions

Min.

Max.

Min.

Max.

Min.

Max.

tRC

Read cycle time

70

-

85

-

120

-

ns

tAA

Address access time

-

70

-

85

-

120

ns

Output load A

tACE

Chip enable access time

-

70

-

85

-

120

ns

Output load A

tOE

Output enable to output valid

-

35

-

45

-

60

ns

Output load A

tCLZ

Chip enable to output in low Z

5

-

5

-

5

-

ns

Output load B

tOLZ

Output enable to output in low Z

5

-

0

-

0

-

ns

Output load B

tCHZ

Chip disable to output in high Z

0

25

0

35

0

45

ns

Output load B

tOHZ

Output disable to output in high Z

0

25

0

25

0

35

ns

Output load B

tOH

Output hold from address change

10

-

10

-

10

-

ns

Output load A

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BQ4015MA-70 Datasheet(PDF) 5 Page - Texas Instruments

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