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CD74AC273 Datasheet(PDF) 6 Page - Texas Instruments |
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CD74AC273 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 15 page 6 Propagation Delay, MR to Qn tPLH, tPHL 1.5 - - 154 - - 169 ns 3.3 4.9 - 17.2 4.7 - 18.9 ns 5 3.5 - 12.3 3.4 - 13.5 ns Input Capacitance CI - - -10- -10 pF Power Dissipation Capacitance CPD (Note 11) - - 45 - - 45 - pF ACT TYPES Propagation Delay, CP to Qn tPLH, tPHL 5 (Note 10) 3.5 - 12.3 3.4 - 13.5 ns Propagation Delay, MR to Qn tPLH, tPHL 5 3.5 - 12.3 3.4 - 13.5 ns Input Capacitance CI - - -10- -10 pF Power Dissipation Capacitance CPD (Note 11) - - 45 - - 45 - pF NOTES: 8. Limits tested 100%. 9. 3.3V Min is at 3.6V, Max is at 3V. 10. 5V Min is at 5.5V, Max is at 4.5V. 11. CPD is used to determine the dynamic power consumption per flip-flop. AC: PD = CPD VCC 2 f i = ∑ (CL VCC 2 f o) ACT: PD =CPD VCC 2 f i + ∑ (CL VCC 2 f o)+VCC ∆ICC where fi = input frequency, fo = output frequency, CL = output load capacitance, VCC = supply voltage. FIGURE 1. PROPAGATION DELAY TIMES AND CLOCK PULSE WIDTH FIGURE 2. PREREQUISITE AND PROPAGATION DELAY TIMES FOR MASTER RESET Switching Specifications Input tr, tf = 3ns, CL = 50pF (Worst Case) (Continued) PARAMETER SYMBOL VCC (V) -40oC TO 85oC -55oC TO 125oC UNITS MIN TYP MAX MIN TYP MAX 90% tf tr VS VS VS VS VS tPLH tPHL tW 10% 10% CP INPUT LEVEL Q MR CP INPUT LEVEL VS Q VS tREM VS VS tPLH tW GND INPUT (Q) CD54AC273, CD74AC273, CD54ACT273, CD74ACT273 |
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