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CD74HC4020 Datasheet(PDF) 1 Page - Texas Instruments

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Part # CD74HC4020
Description  High Speed CMOS Logic 14-Stage Binary Counter
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

CD74HC4020 Datasheet(HTML) 1 Page - Texas Instruments

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Data sheet acquired from Harris Semiconductor
SCHS201
Features
• Fully Static Operation
• Buffered Inputs
• Common Reset
• Negative Edge Clocking
• Typical fMAX = 60 MHz at VCC = 5V, CL = 15pF,
TA = 25
oC
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
Description
The Harris CD74HC4020 and CD74HCT4020 are 14-stage
ripple-carry binary counters. All counter stages are master-
slave flip-flops. The state of the stage advances one count
on the negative clock transition of each input pulse; a high
voltage level on the MR line resets all counters to their zero
state. All inputs and outputs are buffered.
Pinout
CD74HC4020, CD74HCT4020
(PDIP, SOIC)
TOP VIEW
Ordering Information
PART NUMBER
TEMP. RANGE (oC)
PACKAGE
PKG.
NO.
CD74HC4020E
-55 to 125
16 Ld PDIP
E16.3
CD74HCT4020E
-55 to 125
16 Ld PDIP
E16.3
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
Q12
Q13
Q14
Q6
Q5
Q7
GND
Q4
VCC
Q10
Q8
Q9
MR
CP
Q1
Q11
February 1998
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© Harris Corporation 1998
File Number
1484.2
CD74HC4020,
CD74HCT4020
High Speed CMOS Logic
14-Stage Binary Counter
[ /Title
(CD74
HC402
0,
CD74
HCT40
20)
/Sub-
ject
(High
Speed
CMOS


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