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CDC340 Datasheet(PDF) 1 Page - Texas Instruments |
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CDC340 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 7 page CDC340 1-LINE TO 8-LINE CLOCK DRIVER SCAS332B – DECEMBER 1992 – REVISED MAY 1997 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications D TTL-Compatible Inputs and Outputs D Distributes One Clock Input to Eight Outputs D Distributed VCC and Ground Pins Reduce Switching Noise D High-Drive Outputs (–48-mA IOH, 48-mA IOL) D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design Significantly Reduces Power Dissipation D Package Options Include Plastic Small-Outline (DW) and Shrink description The CDC340 is a high-performance clock-driver circuit that distributes one (A) input signal to eight (Y) outputs with minimum skew for clock distribution. Through the use of the control pins (1G and 2G), the outputs can be placed in a high state regardless of the A input. The propagation delays are adjusted at the factory using the P0 and P1 pins. These pins are not intended for customer use and should be strapped to GND. The CDC340 is characterized for operation from 0 °C to 70°C. FUNCTION TABLE INPUTS OUTPUTS 1G 2G A 1Y1 – 1Y4 2Y1 – 2Y4 X X L H H L LH H H L HH H L H LH L H H H H L L Copyright © 1997, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. EPIC- ΙΙB is a trademark of Texas Instruments Incorporated. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC 1G 2G A P0 P1 VCC 2Y4 2Y3 GND VCC 1Y1 1Y2 GND 1Y3 1Y4 GND 2Y1 2Y2 GND DW PACKAGE (TOP VIEW) |
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