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PCI1211GGU Datasheet(PDF) 11 Page - Texas Instruments

Part # PCI1211GGU
Description  PC CARD CONTROLLERS
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

PCI1211GGU Datasheet(HTML) 11 Page - Texas Instruments

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PCI1211 GGU/PGE
PC CARD CONTROLLERS
SCPS033A – OCTOBER 1998
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
The terminals are grouped in tables by functionality, such as PCI system function, power-supply function, etc. The
terminal numbers are also listed for convenient reference. Terminal numbers are shown for both the PGE LQF
package and the GGU ball grid array package.
power supply
TERMINAL
FUNCTION
NAME
PGE NUMBER
GGU NUMBER
FUNCTION
GND
6, 22, 42, 58, 78, 94, 114, 130
B6, C10, D3, F12, H2, K11, L4,
M8
Device ground terminals
VCC
14, 30, 50, 66, 86, 102, 122,
138
B4, C8, D12, F3, H11, K2, L6,
M10
Power supply terminal for core logic (3.3 V)
VCCCB
90, 126
A7, G13
Clamping voltage for PC Card interface. Indicates card
signaling environment of 5 V or 3.3 V.
VCCI
63
L9
Clamping voltage for multifunction terminals (5 V or 3.3 V)
VCCP
18, 44
G1, N4
Clamping voltage for PCI signaling (5 V or 3.3 V)
PC Card power switch
TERMINAL
I/O
NAME
PIN NUMBER
I/O
TYPE
FUNCTION
NAME
PGE
GGU
TYPE
VCCD0
VCCD1
73
74
N13
M13
O
Logic controls to the TPS2211 PC Card power interface switch to control AVCC.
VPPD0
VPPD1
71
72
N12
M12
O
Logic controls to the TPS2211 PC Card power interface switch to control AVPP.
PCI system
TERMINAL
I/O
NAME
PIN NUMBER
I/O
TYPE
FUNCTION
NAME
PGE
GGU
TYPE
PCLK
21
H1
I
PCI bus clock. PCLK provides timing for all transactions on the PCI bus. All PCI signals are sampled
at the rising edge of PCLK.
RST
20
G4
I
PCI reset. When the PCI bus reset is asserted, RST causes the PCI1211 to place all output buffers
in a high-impedance state and reset all internal registers. When RST is asserted, the device is
completely nonfunctional. After RST is deasserted, the PCI1211 is in its default state.
When SUSPEND and RST are asserted, the device is protected from RST clearing the internal
registers. All outputs are placed in a high-impedance state, but the contents of the registers are
preserved.


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